From: Zhen Lei <thunder.leizhen@huawei.com>
To: Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
linux-kernel <linux-kernel@vger.kernel.org>
Cc: Zhen Lei <thunder.leizhen@huawei.com>,
Libin <huawei.libin@huawei.com>,
Kefeng Wang <wangkefeng.wang@huawei.com>,
Jianguo Chen <chenjianguo3@huawei.com>
Subject: [PATCH v2 5/9] clocksource: sp804: prepare for support non-standard register offset
Date: Sat, 12 Sep 2020 19:45:32 +0800 [thread overview]
Message-ID: <20200912114536.2910-6-thunder.leizhen@huawei.com> (raw)
In-Reply-To: <20200912114536.2910-1-thunder.leizhen@huawei.com>
Add two local variables: timer1_base and timer2_base in sp804_of_init(),
to avoid repeatedly calculate the base address of timer2, and make it
easier to recognize timer1. Hope to make the next patch looks more clear.
No functional change.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
drivers/clocksource/timer-sp804.c | 17 +++++++++++------
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/clocksource/timer-sp804.c b/drivers/clocksource/timer-sp804.c
index a443f392a8e7..471c5c6aaf51 100644
--- a/drivers/clocksource/timer-sp804.c
+++ b/drivers/clocksource/timer-sp804.c
@@ -188,6 +188,8 @@ static int __init sp804_of_init(struct device_node *np)
{
static bool initialized = false;
void __iomem *base;
+ void __iomem *timer1_base;
+ void __iomem *timer2_base;
int irq, ret = -EINVAL;
u32 irq_num = 0;
struct clk *clk1, *clk2;
@@ -197,9 +199,12 @@ static int __init sp804_of_init(struct device_node *np)
if (!base)
return -ENXIO;
+ timer1_base = base;
+ timer2_base = base + TIMER_2_BASE;
+
/* Ensure timers are disabled */
- writel(0, base + TIMER_CTRL);
- writel(0, base + TIMER_2_BASE + TIMER_CTRL);
+ writel(0, timer1_base + TIMER_CTRL);
+ writel(0, timer2_base + TIMER_CTRL);
if (initialized || !of_device_is_available(np)) {
ret = -EINVAL;
@@ -228,21 +233,21 @@ static int __init sp804_of_init(struct device_node *np)
of_property_read_u32(np, "arm,sp804-has-irq", &irq_num);
if (irq_num == 2) {
- ret = sp804_clockevents_init(base + TIMER_2_BASE, irq, clk2, name);
+ ret = sp804_clockevents_init(timer2_base, irq, clk2, name);
if (ret)
goto err;
- ret = sp804_clocksource_and_sched_clock_init(base,
+ ret = sp804_clocksource_and_sched_clock_init(timer1_base,
name, clk1, 1);
if (ret)
goto err;
} else {
- ret = sp804_clockevents_init(base, irq, clk1, name);
+ ret = sp804_clockevents_init(timer1_base, irq, clk1, name);
if (ret)
goto err;
- ret = sp804_clocksource_and_sched_clock_init(base + TIMER_2_BASE,
+ ret = sp804_clocksource_and_sched_clock_init(timer2_base,
name, clk2, 1);
if (ret)
goto err;
--
2.26.0.106.g9fadedd
next prev parent reply other threads:[~2020-09-12 11:47 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-12 11:45 [PATCH v2 0/9] clocksource: sp804: add support for Hisilicon sp804 timer Zhen Lei
2020-09-12 11:45 ` [PATCH v2 1/9] clocksource: sp804: cleanup clk_get_sys() Zhen Lei
2020-09-12 11:45 ` [PATCH v2 2/9] clocksource: sp804: remove unused sp804_timer_disable() and timer-sp804.h Zhen Lei
2020-09-12 11:45 ` [PATCH v2 3/9] clocksource: sp804: delete the leading "__" of some functions Zhen Lei
2020-09-12 11:45 ` [PATCH v2 4/9] clocksource: sp804: remove a mismatched comment Zhen Lei
2020-09-12 11:45 ` Zhen Lei [this message]
2020-09-12 11:45 ` [PATCH v2 6/9] clocksource: sp804: support non-standard register offset Zhen Lei
2020-09-12 11:45 ` [PATCH v2 7/9] clocksource: sp804: add support for Hisilicon sp804 timer Zhen Lei
2020-09-18 8:53 ` Daniel Lezcano
2020-09-18 9:34 ` Leizhen (ThunderTown)
2020-09-12 11:45 ` [PATCH v2 8/9] clocksource: sp804: enable Hisilicon sp804 timer 64bit mode Zhen Lei
2020-09-12 11:45 ` [PATCH v2 9/9] dt-bindings: sp804: add support for Hisilicon sp804 timer Zhen Lei
2020-09-15 1:27 ` [PATCH v2 0/9] clocksource: " Leizhen (ThunderTown)
2020-09-17 12:34 ` Daniel Lezcano
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