* [PATCH 01/10] ARM: dts: hisilicon: fix errors detected by snps-dw-apb-uart.yaml
2020-10-10 9:56 [PATCH 00/10] clean up all Hisilicon-related errors detected by DT schema on arm32 Zhen Lei
@ 2020-10-10 9:57 ` Zhen Lei
2020-10-10 9:57 ` [PATCH 02/10] ARM: dts: hisilicon: fix errors detected by pl011.yaml Zhen Lei
` (8 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Zhen Lei @ 2020-10-10 9:57 UTC (permalink / raw)
To: Wei Xu, Rob Herring, devicetree, linux-arm-kernel, linux-kernel; +Cc: Zhen Lei
1. Change node name to match '^serial(@[0-9a-f,]+)*$'
2. Change clock-names to "baudclk", "apb_pclk". Both of them use the same
clock.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
arch/arm/boot/dts/hip01.dtsi | 24 ++++++++++++------------
arch/arm/boot/dts/hip04-d01.dts | 2 +-
arch/arm/boot/dts/hip04.dtsi | 6 +++---
3 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/arch/arm/boot/dts/hip01.dtsi b/arch/arm/boot/dts/hip01.dtsi
index 975d39828405f0b..fd09e6d9309c755 100644
--- a/arch/arm/boot/dts/hip01.dtsi
+++ b/arch/arm/boot/dts/hip01.dtsi
@@ -41,41 +41,41 @@
compatible = "simple-bus";
ranges;
- uart0: uart@10001000 {
+ uart0: serial@10001000 {
compatible = "snps,dw-apb-uart";
reg = <0x10001000 0x1000>;
- clocks = <&hisi_refclk144mhz>;
- clock-names = "apb_pclk";
+ clocks = <&hisi_refclk144mhz>, <&hisi_refclk144mhz>;
+ clock-names = "baudclk", "apb_pclk";
reg-shift = <2>;
interrupts = <0 32 4>;
status = "disabled";
};
- uart1: uart@10002000 {
+ uart1: serial@10002000 {
compatible = "snps,dw-apb-uart";
reg = <0x10002000 0x1000>;
- clocks = <&hisi_refclk144mhz>;
- clock-names = "apb_pclk";
+ clocks = <&hisi_refclk144mhz>, <&hisi_refclk144mhz>;
+ clock-names = "baudclk", "apb_pclk";
reg-shift = <2>;
interrupts = <0 33 4>;
status = "disabled";
};
- uart2: uart@10003000 {
+ uart2: serial@10003000 {
compatible = "snps,dw-apb-uart";
reg = <0x10003000 0x1000>;
- clocks = <&hisi_refclk144mhz>;
- clock-names = "apb_pclk";
+ clocks = <&hisi_refclk144mhz>, <&hisi_refclk144mhz>;
+ clock-names = "baudclk", "apb_pclk";
reg-shift = <2>;
interrupts = <0 34 4>;
status = "disabled";
};
- uart3: uart@10006000 {
+ uart3: serial@10006000 {
compatible = "snps,dw-apb-uart";
reg = <0x10006000 0x1000>;
- clocks = <&hisi_refclk144mhz>;
- clock-names = "apb_pclk";
+ clocks = <&hisi_refclk144mhz>, <&hisi_refclk144mhz>;
+ clock-names = "baudclk", "apb_pclk";
reg-shift = <2>;
interrupts = <0 4 4>;
status = "disabled";
diff --git a/arch/arm/boot/dts/hip04-d01.dts b/arch/arm/boot/dts/hip04-d01.dts
index 9019e0d2ef60b67..f5691dbc26d2419 100644
--- a/arch/arm/boot/dts/hip04-d01.dts
+++ b/arch/arm/boot/dts/hip04-d01.dts
@@ -22,7 +22,7 @@
};
soc {
- uart0: uart@4007000 {
+ uart0: serial@4007000 {
status = "ok";
};
};
diff --git a/arch/arm/boot/dts/hip04.dtsi b/arch/arm/boot/dts/hip04.dtsi
index 555bc6b6720fc94..bccf5ba3d8553c2 100644
--- a/arch/arm/boot/dts/hip04.dtsi
+++ b/arch/arm/boot/dts/hip04.dtsi
@@ -250,12 +250,12 @@
<0 79 4>;
};
- uart0: uart@4007000 {
+ uart0: serial@4007000 {
compatible = "snps,dw-apb-uart";
reg = <0x4007000 0x1000>;
interrupts = <0 381 4>;
- clocks = <&clk_168m>;
- clock-names = "uartclk";
+ clocks = <&clk_168m>, <&clk_168m>;
+ clock-names = "baudclk", "apb_pclk";
reg-shift = <2>;
status = "disabled";
};
--
1.8.3
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 02/10] ARM: dts: hisilicon: fix errors detected by pl011.yaml
2020-10-10 9:56 [PATCH 00/10] clean up all Hisilicon-related errors detected by DT schema on arm32 Zhen Lei
2020-10-10 9:57 ` [PATCH 01/10] ARM: dts: hisilicon: fix errors detected by snps-dw-apb-uart.yaml Zhen Lei
@ 2020-10-10 9:57 ` Zhen Lei
2020-10-10 9:57 ` [PATCH 03/10] ARM: dts: hisilicon: fix errors detected by usb yaml Zhen Lei
` (7 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Zhen Lei @ 2020-10-10 9:57 UTC (permalink / raw)
To: Wei Xu, Rob Herring, devicetree, linux-arm-kernel, linux-kernel; +Cc: Zhen Lei
1. Change node name to match '^serial(@[0-9a-f,]+)*$'
2. Change clock-names to "uartclk", "apb_pclk". Both of them use the same
clock.
3. Change pinctrl-names to "default", "sleep".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
arch/arm/boot/dts/hi3519.dtsi | 20 ++++++++++----------
arch/arm/boot/dts/hi3620-hi4511.dts | 20 ++++++++++----------
arch/arm/boot/dts/hi3620.dtsi | 30 +++++++++++++++---------------
arch/arm/boot/dts/hisi-x5hd2.dtsi | 30 +++++++++++++++---------------
4 files changed, 50 insertions(+), 50 deletions(-)
diff --git a/arch/arm/boot/dts/hi3519.dtsi b/arch/arm/boot/dts/hi3519.dtsi
index 410409a0ed66251..630753c0d704427 100644
--- a/arch/arm/boot/dts/hi3519.dtsi
+++ b/arch/arm/boot/dts/hi3519.dtsi
@@ -52,8 +52,8 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0x12100000 0x1000>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg HI3519_UART0_CLK>;
- clock-names = "apb_pclk";
+ clocks = <&crg HI3519_UART0_CLK>, <&crg HI3519_UART0_CLK>;
+ clock-names = "uartclk", "apb_pclk";
status = "disable";
};
@@ -61,8 +61,8 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0x12101000 0x1000>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg HI3519_UART1_CLK>;
- clock-names = "apb_pclk";
+ clocks = <&crg HI3519_UART1_CLK>, <&crg HI3519_UART1_CLK>;
+ clock-names = "uartclk", "apb_pclk";
status = "disable";
};
@@ -70,8 +70,8 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0x12102000 0x1000>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg HI3519_UART2_CLK>;
- clock-names = "apb_pclk";
+ clocks = <&crg HI3519_UART2_CLK>, <&crg HI3519_UART2_CLK>;
+ clock-names = "uartclk", "apb_pclk";
status = "disable";
};
@@ -79,8 +79,8 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0x12103000 0x1000>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg HI3519_UART3_CLK>;
- clock-names = "apb_pclk";
+ clocks = <&crg HI3519_UART3_CLK>, <&crg HI3519_UART3_CLK>;
+ clock-names = "uartclk", "apb_pclk";
status = "disable";
};
@@ -88,8 +88,8 @@
compatible = "arm,pl011", "arm,primecell";
reg = <0x12104000 0x1000>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg HI3519_UART4_CLK>;
- clock-names = "apb_pclk";
+ clocks = <&crg HI3519_UART4_CLK>, <&crg HI3519_UART4_CLK>;
+ clock-names = "uartclk", "apb_pclk";
status = "disable";
};
diff --git a/arch/arm/boot/dts/hi3620-hi4511.dts b/arch/arm/boot/dts/hi3620-hi4511.dts
index 8c703c3f2fe09b7..1c62bdcca647a9a 100644
--- a/arch/arm/boot/dts/hi3620-hi4511.dts
+++ b/arch/arm/boot/dts/hi3620-hi4511.dts
@@ -27,36 +27,36 @@
status = "ok";
};
- uart0: uart@b00000 { /* console */
- pinctrl-names = "default", "idle";
+ uart0: serial@b00000 { /* console */
+ pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
pinctrl-1 = <&uart0_pmx_idle &uart0_cfg_idle>;
status = "ok";
};
- uart1: uart@b01000 { /* modem */
- pinctrl-names = "default", "idle";
+ uart1: serial@b01000 { /* modem */
+ pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>;
pinctrl-1 = <&uart1_pmx_idle &uart1_cfg_idle>;
status = "ok";
};
- uart2: uart@b02000 { /* audience */
- pinctrl-names = "default", "idle";
+ uart2: serial@b02000 { /* audience */
+ pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;
pinctrl-1 = <&uart2_pmx_idle &uart2_cfg_idle>;
status = "ok";
};
- uart3: uart@b03000 {
- pinctrl-names = "default", "idle";
+ uart3: serial@b03000 {
+ pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>;
pinctrl-1 = <&uart3_pmx_idle &uart3_cfg_idle>;
status = "ok";
};
- uart4: uart@b04000 {
- pinctrl-names = "default", "idle";
+ uart4: serial@b04000 {
+ pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>;
pinctrl-1 = <&uart4_pmx_idle &uart4_cfg_func>;
status = "ok";
diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi
index f683440ee5694b4..d41378391e4cc36 100644
--- a/arch/arm/boot/dts/hi3620.dtsi
+++ b/arch/arm/boot/dts/hi3620.dtsi
@@ -172,48 +172,48 @@
interrupts = <1 13 0xf01>;
};
- uart0: uart@b00000 {
+ uart0: serial@b00000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0xb00000 0x1000>;
interrupts = <0 20 4>;
- clocks = <&clock HI3620_UARTCLK0>;
- clock-names = "apb_pclk";
+ clocks = <&clock HI3620_UARTCLK0>, <&clock HI3620_UARTCLK0>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
- uart1: uart@b01000 {
+ uart1: serial@b01000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0xb01000 0x1000>;
interrupts = <0 21 4>;
- clocks = <&clock HI3620_UARTCLK1>;
- clock-names = "apb_pclk";
+ clocks = <&clock HI3620_UARTCLK1>, <&clock HI3620_UARTCLK1>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
- uart2: uart@b02000 {
+ uart2: serial@b02000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0xb02000 0x1000>;
interrupts = <0 22 4>;
- clocks = <&clock HI3620_UARTCLK2>;
- clock-names = "apb_pclk";
+ clocks = <&clock HI3620_UARTCLK2>, <&clock HI3620_UARTCLK2>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
- uart3: uart@b03000 {
+ uart3: serial@b03000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0xb03000 0x1000>;
interrupts = <0 23 4>;
- clocks = <&clock HI3620_UARTCLK3>;
- clock-names = "apb_pclk";
+ clocks = <&clock HI3620_UARTCLK3>, <&clock HI3620_UARTCLK3>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
- uart4: uart@b04000 {
+ uart4: serial@b04000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0xb04000 0x1000>;
interrupts = <0 24 4>;
- clocks = <&clock HI3620_UARTCLK4>;
- clock-names = "apb_pclk";
+ clocks = <&clock HI3620_UARTCLK4>, <&clock HI3620_UARTCLK4>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi
index e2dbf1d8a67bae2..f645487402f6e86 100644
--- a/arch/arm/boot/dts/hisi-x5hd2.dtsi
+++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi
@@ -86,48 +86,48 @@
status = "disabled";
};
- uart0: uart@b00000 {
+ uart0: serial@b00000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x00b00000 0x1000>;
interrupts = <0 49 4>;
- clocks = <&clock HIX5HD2_FIXED_83M>;
- clock-names = "apb_pclk";
+ clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
- uart1: uart@6000 {
+ uart1: serial@6000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x00006000 0x1000>;
interrupts = <0 50 4>;
- clocks = <&clock HIX5HD2_FIXED_83M>;
- clock-names = "apb_pclk";
+ clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
- uart2: uart@b02000 {
+ uart2: serial@b02000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x00b02000 0x1000>;
interrupts = <0 51 4>;
- clocks = <&clock HIX5HD2_FIXED_83M>;
- clock-names = "apb_pclk";
+ clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
- uart3: uart@b03000 {
+ uart3: serial@b03000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x00b03000 0x1000>;
interrupts = <0 52 4>;
- clocks = <&clock HIX5HD2_FIXED_83M>;
- clock-names = "apb_pclk";
+ clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
- uart4: uart@b04000 {
+ uart4: serial@b04000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0xb04000 0x1000>;
interrupts = <0 53 4>;
- clocks = <&clock HIX5HD2_FIXED_83M>;
- clock-names = "apb_pclk";
+ clocks = <&clock HIX5HD2_FIXED_83M>, <&clock HIX5HD2_FIXED_83M>;
+ clock-names = "uartclk", "apb_pclk";
status = "disabled";
};
--
1.8.3
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 03/10] ARM: dts: hisilicon: fix errors detected by usb yaml
2020-10-10 9:56 [PATCH 00/10] clean up all Hisilicon-related errors detected by DT schema on arm32 Zhen Lei
2020-10-10 9:57 ` [PATCH 01/10] ARM: dts: hisilicon: fix errors detected by snps-dw-apb-uart.yaml Zhen Lei
2020-10-10 9:57 ` [PATCH 02/10] ARM: dts: hisilicon: fix errors detected by pl011.yaml Zhen Lei
@ 2020-10-10 9:57 ` Zhen Lei
2020-10-10 9:57 ` [PATCH 04/10] ARM: dts: hisilicon: fix errors detected by simple-bus.yaml Zhen Lei
` (6 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Zhen Lei @ 2020-10-10 9:57 UTC (permalink / raw)
To: Wei Xu, Rob Herring, devicetree, linux-arm-kernel, linux-kernel; +Cc: Zhen Lei
1. Change node name to match '^usb(@.*)?'
These errrors are detected by generic-ehci.yaml and generic-ohci.yaml.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
arch/arm/boot/dts/hisi-x5hd2.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi
index f645487402f6e86..0c1708945813346 100644
--- a/arch/arm/boot/dts/hisi-x5hd2.dtsi
+++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi
@@ -453,14 +453,14 @@
status = "disabled";
};
- usb0: ehci@1890000 {
+ usb0: usb@1890000 {
compatible = "generic-ehci";
reg = <0x1890000 0x1000>;
interrupts = <0 66 4>;
clocks = <&clock HIX5HD2_USB_CLK>;
};
- usb1: ohci@1880000 {
+ usb1: usb@1880000 {
compatible = "generic-ohci";
reg = <0x1880000 0x1000>;
interrupts = <0 67 4>;
--
1.8.3
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 04/10] ARM: dts: hisilicon: fix errors detected by simple-bus.yaml
2020-10-10 9:56 [PATCH 00/10] clean up all Hisilicon-related errors detected by DT schema on arm32 Zhen Lei
` (2 preceding siblings ...)
2020-10-10 9:57 ` [PATCH 03/10] ARM: dts: hisilicon: fix errors detected by usb yaml Zhen Lei
@ 2020-10-10 9:57 ` Zhen Lei
2020-10-10 9:57 ` [PATCH 05/10] ARM: dts: hisilicon: fix errors detected by root-node.yaml Zhen Lei
` (5 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Zhen Lei @ 2020-10-10 9:57 UTC (permalink / raw)
To: Wei Xu, Rob Herring, devicetree, linux-arm-kernel, linux-kernel; +Cc: Zhen Lei
Change bus node name from "amba" to "amba-bus" to match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
arch/arm/boot/dts/hi3620-hi4511.dts | 2 +-
arch/arm/boot/dts/hi3620.dtsi | 2 +-
arch/arm/boot/dts/hip01.dtsi | 2 +-
arch/arm/boot/dts/hisi-x5hd2.dtsi | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/hi3620-hi4511.dts b/arch/arm/boot/dts/hi3620-hi4511.dts
index 1c62bdcca647a9a..29eedc7fef9861e 100644
--- a/arch/arm/boot/dts/hi3620-hi4511.dts
+++ b/arch/arm/boot/dts/hi3620-hi4511.dts
@@ -22,7 +22,7 @@
reg = <0x40000000 0x20000000>;
};
- amba {
+ amba-bus {
dual_timer0: dual_timer@800000 {
status = "ok";
};
diff --git a/arch/arm/boot/dts/hi3620.dtsi b/arch/arm/boot/dts/hi3620.dtsi
index d41378391e4cc36..905900bf3e82040 100644
--- a/arch/arm/boot/dts/hi3620.dtsi
+++ b/arch/arm/boot/dts/hi3620.dtsi
@@ -63,7 +63,7 @@
};
};
- amba {
+ amba-bus {
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm/boot/dts/hip01.dtsi b/arch/arm/boot/dts/hip01.dtsi
index fd09e6d9309c755..2a796360539002b 100644
--- a/arch/arm/boot/dts/hip01.dtsi
+++ b/arch/arm/boot/dts/hip01.dtsi
@@ -35,7 +35,7 @@
interrupt-parent = <&gic>;
ranges = <0 0x10000000 0x20000000>;
- amba {
+ amba-bus {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi
index 0c1708945813346..8fdfde492919407 100644
--- a/arch/arm/boot/dts/hisi-x5hd2.dtsi
+++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi
@@ -30,7 +30,7 @@
interrupt-parent = <&gic>;
ranges = <0 0xf8000000 0x8000000>;
- amba {
+ amba-bus {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
--
1.8.3
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 05/10] ARM: dts: hisilicon: fix errors detected by root-node.yaml
2020-10-10 9:56 [PATCH 00/10] clean up all Hisilicon-related errors detected by DT schema on arm32 Zhen Lei
` (3 preceding siblings ...)
2020-10-10 9:57 ` [PATCH 04/10] ARM: dts: hisilicon: fix errors detected by simple-bus.yaml Zhen Lei
@ 2020-10-10 9:57 ` Zhen Lei
2020-10-10 9:57 ` [PATCH 06/10] ARM: dts: hisilicon: fix errors detected by synopsys-dw-mshc.yaml Zhen Lei
` (4 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Zhen Lei @ 2020-10-10 9:57 UTC (permalink / raw)
To: Wei Xu, Rob Herring, devicetree, linux-arm-kernel, linux-kernel; +Cc: Zhen Lei
Make the momory node name match the regex "^memory(@[0-9a-f]+)?$" which
is described in memory.yaml. Otherwise, it will be treated as root node,
and misreported by root-node.yaml.
Errors misreported by root-node.yaml:
/: memory: False schema does not allow {'device_type': ['memory'], 'reg':
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
arch/arm/boot/dts/hi3519-demb.dts | 2 +-
arch/arm/boot/dts/hi3620-hi4511.dts | 2 +-
arch/arm/boot/dts/hip01-ca9x2.dts | 2 +-
arch/arm/boot/dts/hisi-x5hd2-dkb.dts | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/hi3519-demb.dts b/arch/arm/boot/dts/hi3519-demb.dts
index 64f8ed126931099..f473fa22e9ce56a 100644
--- a/arch/arm/boot/dts/hi3519-demb.dts
+++ b/arch/arm/boot/dts/hi3519-demb.dts
@@ -14,7 +14,7 @@
serial0 = &uart0;
};
- memory {
+ memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
diff --git a/arch/arm/boot/dts/hi3620-hi4511.dts b/arch/arm/boot/dts/hi3620-hi4511.dts
index 29eedc7fef9861e..ce356c469e1e13e 100644
--- a/arch/arm/boot/dts/hi3620-hi4511.dts
+++ b/arch/arm/boot/dts/hi3620-hi4511.dts
@@ -17,7 +17,7 @@
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@40000000 {
device_type = "memory";
reg = <0x40000000 0x20000000>;
};
diff --git a/arch/arm/boot/dts/hip01-ca9x2.dts b/arch/arm/boot/dts/hip01-ca9x2.dts
index f05e74eacfe0bf2..031476304d94614 100644
--- a/arch/arm/boot/dts/hip01-ca9x2.dts
+++ b/arch/arm/boot/dts/hip01-ca9x2.dts
@@ -37,7 +37,7 @@
};
};
- memory {
+ memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x80000000>;
};
diff --git a/arch/arm/boot/dts/hisi-x5hd2-dkb.dts b/arch/arm/boot/dts/hisi-x5hd2-dkb.dts
index d55e9cd3b12b420..22b122d3f514e43 100644
--- a/arch/arm/boot/dts/hisi-x5hd2-dkb.dts
+++ b/arch/arm/boot/dts/hisi-x5hd2-dkb.dts
@@ -35,7 +35,7 @@
};
};
- memory {
+ memory@0 {
device_type = "memory";
reg = <0x00000000 0x80000000>;
};
--
1.8.3
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 06/10] ARM: dts: hisilicon: fix errors detected by synopsys-dw-mshc.yaml
2020-10-10 9:56 [PATCH 00/10] clean up all Hisilicon-related errors detected by DT schema on arm32 Zhen Lei
` (4 preceding siblings ...)
2020-10-10 9:57 ` [PATCH 05/10] ARM: dts: hisilicon: fix errors detected by root-node.yaml Zhen Lei
@ 2020-10-10 9:57 ` Zhen Lei
2020-10-10 9:57 ` [PATCH 07/10] ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml Zhen Lei
` (3 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Zhen Lei @ 2020-10-10 9:57 UTC (permalink / raw)
To: Wei Xu, Rob Herring, devicetree, linux-arm-kernel, linux-kernel; +Cc: Zhen Lei
Look at the clock-names schema defined in synopsys-dw-mshc.yaml:
clock-names:
items:
- const: biu
- const: ciu
The "biu" needs to be placed before the "ciu".
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
arch/arm/boot/dts/hisi-x5hd2.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi
index 8fdfde492919407..9a513893758bf89 100644
--- a/arch/arm/boot/dts/hisi-x5hd2.dtsi
+++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi
@@ -423,7 +423,7 @@
interrupts = <0 35 4>;
clocks = <&clock HIX5HD2_MMC_CIU_RST>,
<&clock HIX5HD2_MMC_BIU_CLK>;
- clock-names = "ciu", "biu";
+ clock-names = "biu", "ciu";
};
sd: mmc@1820000 {
@@ -432,7 +432,7 @@
interrupts = <0 34 4>;
clocks = <&clock HIX5HD2_SD_CIU_RST>,
<&clock HIX5HD2_SD_BIU_CLK>;
- clock-names = "ciu","biu";
+ clock-names = "biu", "ciu";
};
gmac0: ethernet@1840000 {
--
1.8.3
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 07/10] ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml
2020-10-10 9:56 [PATCH 00/10] clean up all Hisilicon-related errors detected by DT schema on arm32 Zhen Lei
` (5 preceding siblings ...)
2020-10-10 9:57 ` [PATCH 06/10] ARM: dts: hisilicon: fix errors detected by synopsys-dw-mshc.yaml Zhen Lei
@ 2020-10-10 9:57 ` Zhen Lei
2020-10-10 9:57 ` [PATCH 08/10] ARM: dts: hisilicon: fix errors detected by syscon.yaml Zhen Lei
` (2 subsequent siblings)
9 siblings, 0 replies; 11+ messages in thread
From: Zhen Lei @ 2020-10-10 9:57 UTC (permalink / raw)
To: Wei Xu, Rob Herring, devicetree, linux-arm-kernel, linux-kernel; +Cc: Zhen Lei
1. Change clock-names to "sspclk", "apb_pclk". Both of them use the same
clock.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
arch/arm/boot/dts/hi3519.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/hi3519.dtsi b/arch/arm/boot/dts/hi3519.dtsi
index 630753c0d704427..c524c854d319243 100644
--- a/arch/arm/boot/dts/hi3519.dtsi
+++ b/arch/arm/boot/dts/hi3519.dtsi
@@ -127,8 +127,8 @@
compatible = "arm,pl022", "arm,primecell";
reg = <0x12120000 0x1000>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg HI3519_SPI0_CLK>;
- clock-names = "apb_pclk";
+ clocks = <&crg HI3519_SPI0_CLK>, <&crg HI3519_SPI0_CLK>;
+ clock-names = "sspclk", "apb_pclk";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
@@ -139,8 +139,8 @@
compatible = "arm,pl022", "arm,primecell";
reg = <0x12121000 0x1000>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg HI3519_SPI1_CLK>;
- clock-names = "apb_pclk";
+ clocks = <&crg HI3519_SPI1_CLK>, <&crg HI3519_SPI1_CLK>;
+ clock-names = "sspclk", "apb_pclk";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
@@ -151,8 +151,8 @@
compatible = "arm,pl022", "arm,primecell";
reg = <0x12122000 0x1000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&crg HI3519_SPI2_CLK>;
- clock-names = "apb_pclk";
+ clocks = <&crg HI3519_SPI2_CLK>, <&crg HI3519_SPI2_CLK>;
+ clock-names = "sspclk", "apb_pclk";
num-cs = <1>;
#address-cells = <1>;
#size-cells = <0>;
--
1.8.3
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 08/10] ARM: dts: hisilicon: fix errors detected by syscon.yaml
2020-10-10 9:56 [PATCH 00/10] clean up all Hisilicon-related errors detected by DT schema on arm32 Zhen Lei
` (6 preceding siblings ...)
2020-10-10 9:57 ` [PATCH 07/10] ARM: dts: hisilicon: fix errors detected by spi-pl022.yaml Zhen Lei
@ 2020-10-10 9:57 ` Zhen Lei
2020-10-10 9:57 ` [PATCH 09/10] dt-bindings: arm: hisilicon: add missing properties into sysctrl.yaml Zhen Lei
2020-10-10 9:57 ` [PATCH 10/10] dt-bindings: arm: hisilicon: add missing properties into cpuctrl.yaml Zhen Lei
9 siblings, 0 replies; 11+ messages in thread
From: Zhen Lei @ 2020-10-10 9:57 UTC (permalink / raw)
To: Wei Xu, Rob Herring, devicetree, linux-arm-kernel, linux-kernel; +Cc: Zhen Lei
The DT binding for system controller is not allowed to contain only the
compatible string "syscon", the Hisilicon peripheral subsystem controller
should add compatible string "hisilicon,peri-subctrl". Otherwise, the
error "compatible: ['syscon'] is too short" will be reported.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
arch/arm/boot/dts/hisi-x5hd2.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/hisi-x5hd2.dtsi b/arch/arm/boot/dts/hisi-x5hd2.dtsi
index 9a513893758bf89..97211385dc89cbf 100644
--- a/arch/arm/boot/dts/hisi-x5hd2.dtsi
+++ b/arch/arm/boot/dts/hisi-x5hd2.dtsi
@@ -468,7 +468,7 @@
};
peripheral_ctrl: syscon@a20000 {
- compatible = "syscon";
+ compatible = "hisilicon,peri-subctrl", "syscon";
reg = <0xa20000 0x1000>;
};
--
1.8.3
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 09/10] dt-bindings: arm: hisilicon: add missing properties into sysctrl.yaml
2020-10-10 9:56 [PATCH 00/10] clean up all Hisilicon-related errors detected by DT schema on arm32 Zhen Lei
` (7 preceding siblings ...)
2020-10-10 9:57 ` [PATCH 08/10] ARM: dts: hisilicon: fix errors detected by syscon.yaml Zhen Lei
@ 2020-10-10 9:57 ` Zhen Lei
2020-10-10 9:57 ` [PATCH 10/10] dt-bindings: arm: hisilicon: add missing properties into cpuctrl.yaml Zhen Lei
9 siblings, 0 replies; 11+ messages in thread
From: Zhen Lei @ 2020-10-10 9:57 UTC (permalink / raw)
To: Wei Xu, Rob Herring, devicetree, linux-arm-kernel, linux-kernel; +Cc: Zhen Lei
Add properties: #address-cells, #size-cells and ranges. Due to the
Hisilicon system controller node may contains child nodes, change the
value of "additionalProperties" from "false" to "type: object". The
examples have also been updated.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
.../bindings/arm/hisilicon/controller/sysctrl.yaml | 25 +++++++++++++++++++---
1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml
index 449140f89ddbc3b..a27b79694e9883f 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml
@@ -71,21 +71,40 @@ properties:
'#clock-cells':
const: 1
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 1
+
+ ranges: true
+
required:
- compatible
- reg
-additionalProperties: false
+additionalProperties:
+ type: object
examples:
- |
/* Hisilicon system controller */
- system-controller@fc802000 {
+ system-controller@802000 {
compatible = "hisilicon,sysctrl", "syscon";
- reg = <0xfc802000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x802000 0x1000>;
+ reg = <0x802000 0x1000>;
+
smp-offset = <0x31c>;
resume-offset = <0x308>;
reboot-offset = <0x4>;
+
+ clock: clock@0 {
+ compatible = "hisilicon,hi3620-clock";
+ reg = <0 0x10000>;
+ #clock-cells = <1>;
+ };
};
/* HiP01 system controller */
--
1.8.3
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 10/10] dt-bindings: arm: hisilicon: add missing properties into cpuctrl.yaml
2020-10-10 9:56 [PATCH 00/10] clean up all Hisilicon-related errors detected by DT schema on arm32 Zhen Lei
` (8 preceding siblings ...)
2020-10-10 9:57 ` [PATCH 09/10] dt-bindings: arm: hisilicon: add missing properties into sysctrl.yaml Zhen Lei
@ 2020-10-10 9:57 ` Zhen Lei
9 siblings, 0 replies; 11+ messages in thread
From: Zhen Lei @ 2020-10-10 9:57 UTC (permalink / raw)
To: Wei Xu, Rob Herring, devicetree, linux-arm-kernel, linux-kernel; +Cc: Zhen Lei
Add properties: #address-cells, #size-cells and ranges. Due to the
Hisilicon CPU controller node may contains child nodes, change the value
of "additionalProperties" from "false" to "type: object".
The corresponding examples are also added.
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
---
.../bindings/arm/hisilicon/controller/cpuctrl.yaml | 27 +++++++++++++++++++++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml
index f6a314db3a59416..528dad4cde3cd19 100644
--- a/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml
+++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml
@@ -21,9 +21,34 @@ properties:
reg:
maxItems: 1
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ ranges: true
+
required:
- compatible
- reg
-additionalProperties: false
+additionalProperties:
+ type: object
+
+examples:
+ - |
+ cpuctrl@a22000 {
+ compatible = "hisilicon,cpuctrl";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x00a22000 0x2000>;
+ ranges = <0 0x00a22000 0x2000>;
+
+ clock: clock@0 {
+ compatible = "hisilicon,hix5hd2-clock";
+ reg = <0 0x2000>;
+ #clock-cells = <1>;
+ };
+ };
...
--
1.8.3
^ permalink raw reply [flat|nested] 11+ messages in thread