* [PATCH v2 1/2] MIPS: Ingenic: Add missing nodes for Ingenic SoCs and boards.
2020-11-16 17:55 [PATCH v2 0/2] Add missing nodes and refresh defconfig for Ingenic SoCs based boards 周琰杰 (Zhou Yanjie)
@ 2020-11-16 17:55 ` 周琰杰 (Zhou Yanjie)
2020-11-16 17:55 ` [PATCH v2 2/2] MIPS: Ingenic: Refresh defconfig for Ingenic SoCs based boards 周琰杰 (Zhou Yanjie)
2020-11-18 8:55 ` [PATCH v2 0/2] Add missing nodes and refresh " Thomas Bogendoerfer
2 siblings, 0 replies; 4+ messages in thread
From: 周琰杰 (Zhou Yanjie) @ 2020-11-16 17:55 UTC (permalink / raw)
To: tsbogend, robh+dt, paul
Cc: linux-mips, linux-kernel, devicetree, ak, krzk, ebiederm, hns,
paulburton, nixiaoming, dongsheng.qiu, aric.pzqi, rick.tyliu,
yanfei.li, sernia.zhou, zhenwenjin
1.Add OTG/OTG PHY/RNG nodes for JZ4780, CGU/OTG nodes for CI20.
2.Add OTG/OTG PHY/RNG/OST nodes for X1000, SSI/CGU/OST/OTG/SC16IS752
nodes for CU1000-Neo.
3.Add OTG/OTG PHY/DTRNG/OST nodes for X1830, SSI/CGU/OST/OTG/SC16IS752
nodes for CU1830-Neo.
Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Tested by: H. Nikolaus Schaller <hns@goldelico.com> # CI20/jz4780
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
---
Notes:
v1->v2:
1.Add the otg_power node for otg_phy's vcc_supply.
2.Move assigned-clocks in the otg node into the cgu node.
3.Move the position of the SSI node.
arch/mips/boot/dts/ingenic/ci20.dts | 45 +++++++++++++++++++--
arch/mips/boot/dts/ingenic/cu1000-neo.dts | 62 ++++++++++++++++++++++++++---
arch/mips/boot/dts/ingenic/cu1830-neo.dts | 66 ++++++++++++++++++++++++++++---
arch/mips/boot/dts/ingenic/jz4780.dtsi | 45 ++++++++++++++++++++-
arch/mips/boot/dts/ingenic/x1000.dtsi | 56 +++++++++++++++++++++++++-
arch/mips/boot/dts/ingenic/x1830.dtsi | 58 ++++++++++++++++++++++++++-
6 files changed, 313 insertions(+), 19 deletions(-)
diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts
index 75f5bfbf2c37..8877c62609de 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -69,9 +69,11 @@
eth0_power: fixedregulator@0 {
compatible = "regulator-fixed";
+
regulator-name = "eth0_power";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
+
gpio = <&gpb 25 GPIO_ACTIVE_LOW>;
enable-active-high;
};
@@ -83,16 +85,39 @@
wlan0_power: fixedregulator@1 {
compatible = "regulator-fixed";
+
regulator-name = "wlan0_power";
+
gpio = <&gpb 19 GPIO_ACTIVE_LOW>;
enable-active-high;
};
+
+ otg_power: fixedregulator@2 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "otg_power";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+
+ gpio = <&gpf 14 GPIO_ACTIVE_LOW>;
+ enable-active-high;
+ };
};
&ext {
clock-frequency = <48000000>;
};
+&cgu {
+ /*
+ * Use the 32.768 kHz oscillator as the parent of the RTC for a higher
+ * precision.
+ */
+ assigned-clocks = <&cgu JZ4780_CLK_OTGPHY>, <&cgu JZ4780_CLK_RTC>;
+ assigned-clock-parents = <0>, <&cgu JZ4780_CLK_RTCLK>;
+ assigned-clock-rates = <48000000>;
+};
+
&mmc0 {
status = "okay";
@@ -396,6 +421,16 @@
status = "okay";
};
+&otg_phy {
+ status = "okay";
+
+ vcc-supply = <&otg_power>;
+};
+
+&otg {
+ status = "okay";
+};
+
&pinctrl {
pins_uart0: uart0 {
function = "uart0";
@@ -489,7 +524,11 @@
};
&tcu {
- /* 3 MHz for the system timer and clocksource */
- assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>;
- assigned-clock-rates = <3000000>, <3000000>;
+ /*
+ * 750 kHz for the system timer and 3 MHz for the clocksource,
+ * use channel #0 for the system timer, #1 for the clocksource.
+ */
+ assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>,
+ <&tcu TCU_CLK_OST>;
+ assigned-clock-rates = <750000>, <3000000>, <3000000>;
};
diff --git a/arch/mips/boot/dts/ingenic/cu1000-neo.dts b/arch/mips/boot/dts/ingenic/cu1000-neo.dts
index 22a1066d637b..f98cf029efc3 100644
--- a/arch/mips/boot/dts/ingenic/cu1000-neo.dts
+++ b/arch/mips/boot/dts/ingenic/cu1000-neo.dts
@@ -3,7 +3,7 @@
#include "x1000.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/clock/ingenic,tcu.h>
+#include <dt-bindings/clock/ingenic,sysost.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
@@ -31,6 +31,42 @@
};
};
+ ssi: spi-gpio {
+ compatible = "spi-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ num-chipselects = <1>;
+
+ mosi-gpios = <&gpd 2 GPIO_ACTIVE_HIGH>;
+ miso-gpios = <&gpd 3 GPIO_ACTIVE_HIGH>;
+ sck-gpios = <&gpd 0 GPIO_ACTIVE_HIGH>;
+ cs-gpios = <&gpd 1 GPIO_ACTIVE_HIGH>;
+
+ status = "okay";
+
+ spi-max-frequency = <50000000>;
+
+ sc16is752: expander@0 {
+ compatible = "nxp,sc16is752";
+ reg = <0>; /* CE0 */
+ spi-max-frequency = <4000000>;
+
+ clocks = <&exclk_sc16is752>;
+
+ interrupt-parent = <&gpc>;
+ interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ exclk_sc16is752: sc16is752 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <48000000>;
+ };
+ };
+ };
+
wlan_pwrseq: msc1-pwrseq {
compatible = "mmc-pwrseq-simple";
@@ -43,13 +79,19 @@
clock-frequency = <24000000>;
};
-&tcu {
+&cgu {
+ /*
+ * Use the 32.768 kHz oscillator as the parent of the RTC for a higher
+ * precision.
+ */
+ assigned-clocks = <&cgu X1000_CLK_RTC>;
+ assigned-clock-parents = <&cgu X1000_CLK_RTCLK>;
+};
+
+&ost {
/* 1500 kHz for the system timer and clocksource */
- assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER2>;
+ assigned-clocks = <&ost OST_CLK_PERCPU_TIMER>, <&ost OST_CLK_GLOBAL_TIMER>;
assigned-clock-rates = <1500000>, <1500000>;
-
- /* Use channel #0 for the system timer channel #2 for the clocksource */
- ingenic,pwm-channels-mask = <0xfa>;
};
&uart2 {
@@ -135,6 +177,14 @@
};
};
+&otg_phy {
+ status = "okay";
+};
+
+&otg {
+ status = "okay";
+};
+
&pinctrl {
pins_uart2: uart2 {
function = "uart2";
diff --git a/arch/mips/boot/dts/ingenic/cu1830-neo.dts b/arch/mips/boot/dts/ingenic/cu1830-neo.dts
index 640f96c00d63..cfcb40edb7d9 100644
--- a/arch/mips/boot/dts/ingenic/cu1830-neo.dts
+++ b/arch/mips/boot/dts/ingenic/cu1830-neo.dts
@@ -3,7 +3,7 @@
#include "x1830.dtsi"
#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/clock/ingenic,tcu.h>
+#include <dt-bindings/clock/ingenic,sysost.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
@@ -31,6 +31,42 @@
};
};
+ ssi0: spi-gpio {
+ compatible = "spi-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ num-chipselects = <1>;
+
+ mosi-gpios = <&gpc 12 GPIO_ACTIVE_HIGH>;
+ miso-gpios = <&gpc 11 GPIO_ACTIVE_HIGH>;
+ sck-gpios = <&gpc 15 GPIO_ACTIVE_HIGH>;
+ cs-gpios = <&gpc 16 GPIO_ACTIVE_HIGH>;
+
+ status = "okay";
+
+ spi-max-frequency = <50000000>;
+
+ sc16is752: expander@0 {
+ compatible = "nxp,sc16is752";
+ reg = <0>; /* CE0 */
+ spi-max-frequency = <4000000>;
+
+ clocks = <&exclk_sc16is752>;
+
+ interrupt-parent = <&gpb>;
+ interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ exclk_sc16is752: sc16is752 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <48000000>;
+ };
+ };
+ };
+
wlan_pwrseq: msc1-pwrseq {
compatible = "mmc-pwrseq-simple";
@@ -43,13 +79,19 @@
clock-frequency = <24000000>;
};
-&tcu {
+&cgu {
+ /*
+ * Use the 32.768 kHz oscillator as the parent of the RTC for a higher
+ * precision.
+ */
+ assigned-clocks = <&cgu X1830_CLK_RTC>;
+ assigned-clock-parents = <&cgu X1830_CLK_RTCLK>;
+};
+
+&ost {
/* 1500 kHz for the system timer and clocksource */
- assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER2>;
+ assigned-clocks = <&ost OST_CLK_PERCPU_TIMER>, <&ost OST_CLK_GLOBAL_TIMER>;
assigned-clock-rates = <1500000>, <1500000>;
-
- /* Use channel #0 for the system timer channel #2 for the clocksource */
- ingenic,pwm-channels-mask = <0xfa>;
};
&uart1 {
@@ -73,6 +115,10 @@
};
};
+&dtrng {
+ status = "okay";
+};
+
&msc0 {
status = "okay";
@@ -135,6 +181,14 @@
};
};
+&otg_phy {
+ status = "okay";
+};
+
+&otg {
+ status = "okay";
+};
+
&pinctrl {
pins_uart1: uart1 {
function = "uart1";
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index dfb5a7e1bb21..8d01feef7ff5 100644
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -61,13 +61,34 @@
};
cgu: jz4780-cgu@10000000 {
- compatible = "ingenic,jz4780-cgu";
+ compatible = "ingenic,jz4780-cgu", "simple-mfd";
reg = <0x10000000 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x10000000 0x100>;
+
+ #clock-cells = <1>;
clocks = <&ext>, <&rtc>;
clock-names = "ext", "rtc";
- #clock-cells = <1>;
+ otg_phy: usb-phy@3c {
+ compatible = "ingenic,jz4780-phy";
+ reg = <0x3c 0x10>;
+
+ clocks = <&cgu JZ4780_CLK_OTG1>;
+
+ #phy-cells = <0>;
+
+ status = "disabled";
+ };
+
+ rng: rng@d8 {
+ compatible = "ingenic,jz4780-rng";
+ reg = <0xd8 0x8>;
+
+ status = "disabled";
+ };
};
tcu: timer@10002000 {
@@ -494,4 +515,24 @@
status = "disabled";
};
+
+ otg: usb@13500000 {
+ compatible = "ingenic,jz4780-otg", "snps,dwc2";
+ reg = <0x13500000 0x40000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <21>;
+
+ clocks = <&cgu JZ4780_CLK_UHC>;
+ clock-names = "otg";
+
+ phys = <&otg_phy>;
+ phy-names = "usb2-phy";
+
+ g-rx-fifo-size = <768>;
+ g-np-tx-fifo-size = <256>;
+ g-tx-fifo-size = <256 256 256 256 256 256 256 512>;
+
+ status = "disabled";
+ };
};
diff --git a/arch/mips/boot/dts/ingenic/x1000.dtsi b/arch/mips/boot/dts/ingenic/x1000.dtsi
index 1f1f896dd1f7..aac9dedaf334 100644
--- a/arch/mips/boot/dts/ingenic/x1000.dtsi
+++ b/arch/mips/boot/dts/ingenic/x1000.dtsi
@@ -52,13 +52,47 @@
};
cgu: x1000-cgu@10000000 {
- compatible = "ingenic,x1000-cgu";
+ compatible = "ingenic,x1000-cgu", "simple-mfd";
reg = <0x10000000 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x10000000 0x100>;
#clock-cells = <1>;
clocks = <&exclk>, <&rtclk>;
clock-names = "ext", "rtc";
+
+ otg_phy: usb-phy@3c {
+ compatible = "ingenic,x1000-phy";
+ reg = <0x3c 0x10>;
+
+ clocks = <&cgu X1000_CLK_OTGPHY>;
+
+ #phy-cells = <0>;
+
+ status = "disabled";
+ };
+
+ rng: rng@d8 {
+ compatible = "ingenic,x1000-rng";
+ reg = <0xd8 0x8>;
+
+ status = "disabled";
+ };
+ };
+
+ ost: timer@12000000 {
+ compatible = "ingenic,x1000-ost";
+ reg = <0x12000000 0x3c>;
+
+ #clock-cells = <1>;
+
+ clocks = <&cgu X1000_CLK_OST>;
+ clock-names = "ost";
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <3>;
};
tcu: timer@10002000 {
@@ -323,4 +357,24 @@
status = "disabled";
};
};
+
+ otg: usb@13500000 {
+ compatible = "ingenic,x1000-otg", "snps,dwc2";
+ reg = <0x13500000 0x40000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <21>;
+
+ clocks = <&cgu X1000_CLK_OTG>;
+ clock-names = "otg";
+
+ phys = <&otg_phy>;
+ phy-names = "usb2-phy";
+
+ g-rx-fifo-size = <768>;
+ g-np-tx-fifo-size = <256>;
+ g-tx-fifo-size = <256 256 256 256 256 256 256 512>;
+
+ status = "disabled";
+ };
};
diff --git a/arch/mips/boot/dts/ingenic/x1830.dtsi b/arch/mips/boot/dts/ingenic/x1830.dtsi
index b05dac3ae308..b21c93057356 100644
--- a/arch/mips/boot/dts/ingenic/x1830.dtsi
+++ b/arch/mips/boot/dts/ingenic/x1830.dtsi
@@ -52,13 +52,40 @@
};
cgu: x1830-cgu@10000000 {
- compatible = "ingenic,x1830-cgu";
+ compatible = "ingenic,x1830-cgu", "simple-mfd";
reg = <0x10000000 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x10000000 0x100>;
#clock-cells = <1>;
clocks = <&exclk>, <&rtclk>;
clock-names = "ext", "rtc";
+
+ otg_phy: usb-phy@3c {
+ compatible = "ingenic,x1830-phy";
+ reg = <0x3c 0x10>;
+
+ clocks = <&cgu X1830_CLK_OTGPHY>;
+
+ #phy-cells = <0>;
+
+ status = "disabled";
+ };
+ };
+
+ ost: timer@12000000 {
+ compatible = "ingenic,x1830-ost", "ingenic,x1000-ost";
+ reg = <0x12000000 0x3c>;
+
+ #clock-cells = <1>;
+
+ clocks = <&cgu X1830_CLK_OST>;
+ clock-names = "ost";
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <4>;
};
tcu: timer@10002000 {
@@ -236,6 +263,15 @@
status = "disabled";
};
+ dtrng: trng@10072000 {
+ compatible = "ingenic,x1830-dtrng";
+ reg = <0x10072000 0xc>;
+
+ clocks = <&cgu X1830_CLK_DTRNG>;
+
+ status = "disabled";
+ };
+
pdma: dma-controller@13420000 {
compatible = "ingenic,x1830-dma";
reg = <0x13420000 0x400
@@ -311,4 +347,24 @@
status = "disabled";
};
};
+
+ otg: usb@13500000 {
+ compatible = "ingenic,x1830-otg", "snps,dwc2";
+ reg = <0x13500000 0x40000>;
+
+ interrupt-parent = <&intc>;
+ interrupts = <21>;
+
+ clocks = <&cgu X1830_CLK_OTG>;
+ clock-names = "otg";
+
+ phys = <&otg_phy>;
+ phy-names = "usb2-phy";
+
+ g-rx-fifo-size = <768>;
+ g-np-tx-fifo-size = <256>;
+ g-tx-fifo-size = <256 256 256 256 256 256 256 512>;
+
+ status = "disabled";
+ };
};
--
2.11.0
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH v2 2/2] MIPS: Ingenic: Refresh defconfig for Ingenic SoCs based boards.
2020-11-16 17:55 [PATCH v2 0/2] Add missing nodes and refresh defconfig for Ingenic SoCs based boards 周琰杰 (Zhou Yanjie)
2020-11-16 17:55 ` [PATCH v2 1/2] MIPS: Ingenic: Add missing nodes for Ingenic SoCs and boards 周琰杰 (Zhou Yanjie)
@ 2020-11-16 17:55 ` 周琰杰 (Zhou Yanjie)
2020-11-18 8:55 ` [PATCH v2 0/2] Add missing nodes and refresh " Thomas Bogendoerfer
2 siblings, 0 replies; 4+ messages in thread
From: 周琰杰 (Zhou Yanjie) @ 2020-11-16 17:55 UTC (permalink / raw)
To: tsbogend, robh+dt, paul
Cc: linux-mips, linux-kernel, devicetree, ak, krzk, ebiederm, hns,
paulburton, nixiaoming, dongsheng.qiu, aric.pzqi, rick.tyliu,
yanfei.li, sernia.zhou, zhenwenjin
1.Refresh defconfig of CI20 to support OTG and RNG.
2.Refresh defconfig of CU1000-Neo to support OTG/RNG/OST/SC16IS752.
3.Refresh defconfig of CU1830-Neo to support OTG/DTRNG/OST/SC16IS752.
Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Tested by: H. Nikolaus Schaller <hns@goldelico.com> # CI20/jz4780
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
---
Notes:
v1->v2:
Select CONFIG_JZ4780_EFUSE as default.
arch/mips/configs/ci20_defconfig | 15 +++++++++++++--
arch/mips/configs/cu1000-neo_defconfig | 28 +++++++++++++++++++++++-----
arch/mips/configs/cu1830-neo_defconfig | 32 +++++++++++++++++++++++++-------
3 files changed, 61 insertions(+), 14 deletions(-)
diff --git a/arch/mips/configs/ci20_defconfig b/arch/mips/configs/ci20_defconfig
index 052c5ad0f2b1..ab7ebb066834 100644
--- a/arch/mips/configs/ci20_defconfig
+++ b/arch/mips/configs/ci20_defconfig
@@ -49,6 +49,8 @@ CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_NAND_JZ4780=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_FASTMAP=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_ARC is not set
# CONFIG_NET_VENDOR_BROADCOM is not set
@@ -77,7 +79,6 @@ CONFIG_SERIAL_8250_NR_UARTS=5
CONFIG_SERIAL_8250_RUNTIME_UARTS=5
CONFIG_SERIAL_8250_INGENIC=y
CONFIG_SERIAL_OF_PLATFORM=y
-# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_JZ4780=y
CONFIG_SPI=y
@@ -99,7 +100,12 @@ CONFIG_IR_GPIO_TX=m
CONFIG_MEDIA_SUPPORT=m
# CONFIG_VGA_CONSOLE is not set
# CONFIG_HID is not set
-# CONFIG_USB_SUPPORT is not set
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_CH341=y
+CONFIG_USB_GADGET=y
CONFIG_MMC=y
CONFIG_MMC_JZ4740=y
CONFIG_NEW_LEDS=y
@@ -131,8 +137,13 @@ CONFIG_MEMORY=y
CONFIG_JZ4780_NEMC=y
CONFIG_PWM=y
CONFIG_PWM_JZ4740=m
+CONFIG_JZ4780_EFUSE=y
+CONFIG_JZ4770_PHY=y
CONFIG_EXT4_FS=y
# CONFIG_DNOTIFY is not set
+CONFIG_AUTOFS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_UTF8=y
CONFIG_PROC_KCORE=y
# CONFIG_PROC_PAGE_MONITOR is not set
CONFIG_TMPFS=y
diff --git a/arch/mips/configs/cu1000-neo_defconfig b/arch/mips/configs/cu1000-neo_defconfig
index 55d0690a3ffe..9d75f5b77d5d 100644
--- a/arch/mips/configs/cu1000-neo_defconfig
+++ b/arch/mips/configs/cu1000-neo_defconfig
@@ -25,6 +25,7 @@ CONFIG_HIGHMEM=y
CONFIG_HZ_100=y
# CONFIG_SECCOMP is not set
# CONFIG_SUSPEND is not set
+CONFIG_MODULES=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
# CONFIG_COMPACTION is not set
CONFIG_CMA=y
@@ -32,15 +33,17 @@ CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
-CONFIG_CFG80211=y
+CONFIG_CFG80211=m
CONFIG_UEVENT_HELPER=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
# CONFIG_ALLOW_DEV_COREDUMP is not set
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
CONFIG_NETDEVICES=y
CONFIG_STMMAC_ETH=y
CONFIG_SMSC_PHY=y
-CONFIG_BRCMFMAC=y
+CONFIG_BRCMFMAC=m
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
@@ -52,16 +55,25 @@ CONFIG_SERIAL_8250_NR_UARTS=3
CONFIG_SERIAL_8250_RUNTIME_UARTS=3
CONFIG_SERIAL_8250_INGENIC=y
CONFIG_SERIAL_OF_PLATFORM=y
-# CONFIG_HW_RANDOM is not set
+CONFIG_SERIAL_SC16IS7XX=y
+# CONFIG_SERIAL_SC16IS7XX_I2C is not set
+CONFIG_SERIAL_SC16IS7XX_SPI=y
CONFIG_I2C=y
CONFIG_I2C_JZ4780=y
+CONFIG_SPI=y
+CONFIG_SPI_GPIO=y
CONFIG_GPIO_SYSFS=y
-CONFIG_SENSORS_ADS7828=y
+CONFIG_SENSORS_ADS7828=m
CONFIG_WATCHDOG=y
CONFIG_JZ4740_WDT=y
# CONFIG_VGA_CONSOLE is not set
# CONFIG_HID is not set
-# CONFIG_USB_SUPPORT is not set
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_CH341=y
+CONFIG_USB_GADGET=y
CONFIG_MMC=y
CONFIG_MMC_JZ4740=y
CONFIG_NEW_LEDS=y
@@ -72,16 +84,22 @@ CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_JZ4740=y
CONFIG_DMADEVICES=y
CONFIG_DMA_JZ4780=y
+# CONFIG_INGENIC_TIMER is not set
+CONFIG_INGENIC_SYSOST=y
# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_JZ4770_PHY=y
CONFIG_EXT4_FS=y
# CONFIG_DNOTIFY is not set
CONFIG_AUTOFS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_UTF8=y
CONFIG_PROC_KCORE=y
# CONFIG_PROC_PAGE_MONITOR is not set
CONFIG_TMPFS=y
CONFIG_CONFIGFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NLS=y
+CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_936=y
CONFIG_NLS_CODEPAGE_950=y
CONFIG_NLS_ASCII=y
diff --git a/arch/mips/configs/cu1830-neo_defconfig b/arch/mips/configs/cu1830-neo_defconfig
index e7064851a47a..29decd0003c6 100644
--- a/arch/mips/configs/cu1830-neo_defconfig
+++ b/arch/mips/configs/cu1830-neo_defconfig
@@ -25,6 +25,7 @@ CONFIG_HIGHMEM=y
CONFIG_HZ_100=y
# CONFIG_SECCOMP is not set
# CONFIG_SUSPEND is not set
+CONFIG_MODULES=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
# CONFIG_COMPACTION is not set
CONFIG_CMA=y
@@ -32,18 +33,20 @@ CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
-CONFIG_CFG80211=y
+CONFIG_CFG80211=m
CONFIG_UEVENT_HELPER=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
# CONFIG_ALLOW_DEV_COREDUMP is not set
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
CONFIG_MD=y
-CONFIG_BLK_DEV_MD=y
-CONFIG_BLK_DEV_DM=y
+CONFIG_BLK_DEV_MD=m
+CONFIG_BLK_DEV_DM=m
CONFIG_NETDEVICES=y
CONFIG_STMMAC_ETH=y
CONFIG_ICPLUS_PHY=y
-CONFIG_BRCMFMAC=y
+CONFIG_BRCMFMAC=m
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_SERIO is not set
@@ -55,16 +58,25 @@ CONFIG_SERIAL_8250_NR_UARTS=2
CONFIG_SERIAL_8250_RUNTIME_UARTS=2
CONFIG_SERIAL_8250_INGENIC=y
CONFIG_SERIAL_OF_PLATFORM=y
-# CONFIG_HW_RANDOM is not set
+CONFIG_SERIAL_SC16IS7XX=y
+# CONFIG_SERIAL_SC16IS7XX_I2C is not set
+CONFIG_SERIAL_SC16IS7XX_SPI=y
CONFIG_I2C=y
CONFIG_I2C_JZ4780=y
+CONFIG_SPI=y
+CONFIG_SPI_GPIO=y
CONFIG_GPIO_SYSFS=y
-CONFIG_SENSORS_ADS7828=y
+CONFIG_SENSORS_ADS7828=m
CONFIG_WATCHDOG=y
CONFIG_JZ4740_WDT=y
# CONFIG_VGA_CONSOLE is not set
# CONFIG_HID is not set
-# CONFIG_USB_SUPPORT is not set
+CONFIG_USB=y
+CONFIG_USB_STORAGE=y
+CONFIG_USB_DWC2=y
+CONFIG_USB_SERIAL=y
+CONFIG_USB_SERIAL_CH341=y
+CONFIG_USB_GADGET=y
CONFIG_MMC=y
CONFIG_MMC_JZ4740=y
CONFIG_NEW_LEDS=y
@@ -75,16 +87,22 @@ CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_JZ4740=y
CONFIG_DMADEVICES=y
CONFIG_DMA_JZ4780=y
+# CONFIG_INGENIC_TIMER is not set
+CONFIG_INGENIC_SYSOST=y
# CONFIG_IOMMU_SUPPORT is not set
+CONFIG_JZ4770_PHY=y
CONFIG_EXT4_FS=y
# CONFIG_DNOTIFY is not set
CONFIG_AUTOFS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_UTF8=y
CONFIG_PROC_KCORE=y
# CONFIG_PROC_PAGE_MONITOR is not set
CONFIG_TMPFS=y
CONFIG_CONFIGFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NLS=y
+CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_CODEPAGE_936=y
CONFIG_NLS_CODEPAGE_950=y
CONFIG_NLS_ASCII=y
--
2.11.0
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