Re: [PATCH] ARM: fix gcc-10 thumb2-kernel regression

[Daniel Thompson <daniel.thompson@linaro.org>]

On Wed, May 12, 2021 at 02:38:36PM +0200, Ard Biesheuvel wrote:
> On Wed, 12 May 2021 at 10:13, Arnd Bergmann <arnd@kernel.org> wrote:
> >
> > From: Arnd Bergmann <arnd@arndb.de>
> >
> > When building the kernel wtih gcc-10 or higher using the
> > CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y flag, the compiler picks a slightly
> > different set of registers for the inline assembly in cpu_init() that
> > subsequently results in a corrupt kernel stack as well as remaining in
> > FIQ mode. If a banked register is used for the last argument, the wrong
> > version of that register gets loaded into CPSR_c.  When building in Arm
> > mode, the arguments are passed as immediate values and the bug cannot
> > happen.
> >
> > This got introduced when Daniel reworked the FIQ handling and was
> > technically always broken, but happened to work with both clang and gcc
> > before gcc-10 as long as they picked one of the lower registers.
> > This is probably an indication that still very few people build the
> > kernel in Thumb2 mode.
> >
> > Marek pointed out the problem on IRC, Arnd narrowed it down to this
> > inline assembly and Russell pinpointed the exact bug.
> >
> > Change the constraints to force the final mode switch to use a non-banked
> > register for the argument to ensure that the correct constant gets loaded.
> > Another alternative would be to always use registers for the constant
> > arguments to avoid the #ifdef that has now become more complex.
> >
> > Cc: <stable@vger.kernel.org> # v3.18+
> > Cc: Daniel Thompson <daniel.thompson@linaro.org>
> > Reported-by: Marek Vasut <marek.vasut@gmail.com>
> > Fixes: c0e7f7ee717e ("ARM: 8150/3: fiq: Replace default FIQ handler")
> > Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> 
> Nice bug!

Indeed. Many thanks for those involved with the find and fix!


Daniel.