From: Yazen Ghannam <yazen.ghannam@amd.com>
To: linux-edac@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, bp@alien8.de, mchehab@kernel.org,
tony.luck@intel.com, Smita.KoralahalliChannabasappa@amd.com,
Yazen Ghannam <yazen.ghannam@amd.com>
Subject: [PATCH v2 27/31] EDAC/amd64: Update CS ID calculation to match reference code
Date: Wed, 23 Jun 2021 19:19:58 +0000 [thread overview]
Message-ID: <20210623192002.3671647-28-yazen.ghannam@amd.com> (raw)
In-Reply-To: <20210623192002.3671647-1-yazen.ghannam@amd.com>
Redo the current CS ID calculations to match the reference code. Helper
functions are introduced that will be expanded for future DF versions.
Use u16 type for dst_fabric_id and component_id_mask values to
accommodate larger bitfields in future DF versions.
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
---
Link:
https://lkml.kernel.org/r/20210507190140.18854-24-Yazen.Ghannam@amd.com
v1->v2:
* Moved from arch/x86 to EDAC.
* Added functions to data_fabric_ops.
drivers/edac/amd64_edac.c | 52 ++++++++++++++++++++++++++-------------
1 file changed, 35 insertions(+), 17 deletions(-)
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index fa8046e2b055..fc2cd288df0f 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -1112,6 +1112,8 @@ struct addr_ctx {
struct data_fabric_ops {
u64 (*get_hi_addr_offset)(struct addr_ctx *ctx);
+ u16 (*get_dst_fabric_id)(struct addr_ctx *ctx);
+ u16 (*get_component_id_mask)(struct addr_ctx *ctx);
u8 (*get_die_id_shift)(struct addr_ctx *ctx);
u8 (*get_socket_id_shift)(struct addr_ctx *ctx);
int (*get_intlv_mode)(struct addr_ctx *ctx);
@@ -1230,6 +1232,16 @@ static u8 get_socket_id_shift_df2(struct addr_ctx *ctx)
return (ctx->reg_fab_id_mask0 >> 28) & 0xF;
}
+static u16 get_dst_fabric_id_df2(struct addr_ctx *ctx)
+{
+ return ctx->reg_limit_addr & 0xFF;
+}
+
+static u16 get_component_id_mask_df2(struct addr_ctx *ctx)
+{
+ return (~(ctx->socket_id_mask | ctx->die_id_mask)) & 0xFF;
+}
+
struct data_fabric_ops df2_ops = {
.get_hi_addr_offset = &get_hi_addr_offset_df2,
.get_intlv_mode = &get_intlv_mode_df2,
@@ -1239,6 +1251,8 @@ struct data_fabric_ops df2_ops = {
.get_masks = &get_masks_df2,
.get_die_id_shift = &get_die_id_shift_df2,
.get_socket_id_shift = &get_socket_id_shift_df2,
+ .get_dst_fabric_id = &get_dst_fabric_id_df2,
+ .get_component_id_mask = &get_component_id_mask_df2,
};
struct data_fabric_ops *df_ops;
@@ -1339,38 +1353,42 @@ static void get_intlv_num_chan(struct addr_ctx *ctx)
}
}
-static int calculate_cs_id(struct addr_ctx *ctx)
+static u8 calc_level_bits(u8 id, u8 level_mask, u8 shift, u8 mask, u8 num_bits)
{
- u8 die_id_bit = 0, sock_id_bit, cs_mask = 0;
+ return (((id & level_mask) >> shift) & mask) << num_bits;
+}
- /* If interleaved over more than 1 channel: */
- if (ctx->intlv_num_chan) {
- die_id_bit = ctx->intlv_num_chan;
- cs_mask = (1 << die_id_bit) - 1;
- ctx->cs_id = ctx->cs_fabric_id & cs_mask;
- }
+static int calculate_cs_id(struct addr_ctx *ctx)
+{
+ u16 dst_fabric_id = df_ops->get_dst_fabric_id(ctx);
+ u16 mask, num_intlv_bits = ctx->intlv_num_chan;
- /* Return early if no die interleaving and no socket interleaving. */
- if (!(ctx->intlv_num_dies || ctx->intlv_num_sockets))
- return 0;
+ mask = df_ops->get_component_id_mask(ctx);
+ ctx->cs_id = (ctx->cs_fabric_id & mask) - (dst_fabric_id & mask);
- sock_id_bit = die_id_bit;
+ mask = (1 << num_intlv_bits) - 1;
+ ctx->cs_id &= mask;
/* If interleaved over more than 1 die: */
if (ctx->intlv_num_dies) {
u8 die_id_shift = df_ops->get_die_id_shift(ctx);
- sock_id_bit = die_id_bit + ctx->intlv_num_dies;
- ctx->cs_id |= ((ctx->cs_fabric_id & ctx->die_id_mask)
- >> die_id_shift) << die_id_bit;
+ mask = (1 << ctx->intlv_num_dies) - 1;
+
+ ctx->cs_id |= calc_level_bits(ctx->cs_fabric_id, ctx->die_id_mask,
+ die_id_shift, mask, num_intlv_bits);
+
+ num_intlv_bits += ctx->intlv_num_dies;
}
/* If interleaved over more than 1 socket: */
if (ctx->intlv_num_sockets) {
u8 socket_id_shift = df_ops->get_socket_id_shift(ctx);
- ctx->cs_id |= ((ctx->cs_fabric_id & ctx->socket_id_mask)
- >> socket_id_shift) << sock_id_bit;
+ mask = (1 << ctx->intlv_num_sockets) - 1;
+
+ ctx->cs_id |= calc_level_bits(ctx->cs_fabric_id, ctx->socket_id_mask,
+ socket_id_shift, mask, num_intlv_bits);
}
return 0;
--
2.25.1
next prev parent reply other threads:[~2021-06-23 19:22 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-23 19:19 [PATCH v2 00/31] AMD MCA Address Translation Updates Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 01/31] x86/MCE/AMD, EDAC/amd64: Move address translation to AMD64 EDAC Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 02/31] x86/amd_nb, EDAC/amd64: Move DF Indirect Read " Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 03/31] EDAC/amd64: Don't use naked values for DF registers Yazen Ghannam
2021-06-25 15:21 ` Borislav Petkov
2021-07-08 19:35 ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 04/31] EDAC/amd64: Allow for DF Indirect Broadcast reads Yazen Ghannam
2021-06-30 16:22 ` Borislav Petkov
2021-07-08 19:44 ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 05/31] EDAC/amd64: Add context struct Yazen Ghannam
2021-06-30 17:17 ` Borislav Petkov
2021-07-08 19:53 ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 06/31] EDAC/amd64: Define Data Fabric operations Yazen Ghannam
2021-06-30 17:19 ` Borislav Petkov
2021-07-08 19:55 ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 07/31] EDAC/amd64: Define functions for DramOffset Yazen Ghannam
2021-06-30 17:27 ` Borislav Petkov
2021-07-08 20:08 ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 08/31] EDAC/amd64: Define function to read DRAM address map registers Yazen Ghannam
2021-06-30 17:29 ` Borislav Petkov
2021-06-23 19:19 ` [PATCH v2 09/31] EDAC/amd64: Define function to find interleaving mode Yazen Ghannam
2021-06-30 17:33 ` Borislav Petkov
2021-07-08 20:09 ` Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 10/31] EDAC/amd64: Define function to denormalize address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 11/31] EDAC/amd64: Define function to add DRAM base and hole Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 12/31] EDAC/amd64: Define function to dehash address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 13/31] EDAC/amd64: Define function to check DRAM limit address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 14/31] EDAC/amd64: Remove goto statements Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 15/31] EDAC/amd64: Simplify function parameters Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 16/31] EDAC/amd64: Define function to get Interleave Address Bit Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 17/31] EDAC/amd64: Skip denormalization if no interleaving Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 18/31] EDAC/amd64: Define function to get number of interleaved channels Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 19/31] EDAC/amd64: Define function to get number of interleaved dies Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 20/31] EDAC/amd64: Define function to get number of interleaved sockets Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 21/31] EDAC/amd64: Remove unnecessary assert Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 22/31] EDAC/amd64: Define function to make space for CS ID Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 23/31] EDAC/amd64: Define function to calculate " Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 24/31] EDAC/amd64: Define function to insert CS ID into address Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 25/31] EDAC/amd64: Define function to get CS Fabric ID Yazen Ghannam
2021-06-23 19:19 ` [PATCH v2 26/31] EDAC/amd64: Define function to find shift and mask values Yazen Ghannam
2021-06-23 19:19 ` Yazen Ghannam [this message]
2021-06-23 19:19 ` [PATCH v2 28/31] EDAC/amd64: Match hash function to reference code Yazen Ghannam
2021-06-23 19:20 ` [PATCH v2 29/31] EDAC/amd64: Define helper function to get interleave address select bit Yazen Ghannam
2021-06-23 19:20 ` [PATCH v2 30/31] EDAC/amd64: Add support for address translation on DF3 systems Yazen Ghannam
2021-06-23 19:20 ` [PATCH v2 31/31] EDAC/amd64: Add glossary of acronyms for address translation Yazen Ghannam
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