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* [PATCH v1] drm/msm/dpu: Fix sm8250_mdp register length
@ 2021-06-28  8:50 Robert Foss
  2021-06-28  9:42 ` AngeloGioacchino Del Regno
  0 siblings, 1 reply; 2+ messages in thread
From: Robert Foss @ 2021-06-28  8:50 UTC (permalink / raw)
  To: robdclark, sean, airlied, daniel, jonathan, dmitry.baryshkov,
	angelogioacchino.delregno, lee.jones, kalyan_t, linux-arm-msm,
	dri-devel, freedreno, linux-kernel
  Cc: Robert Foss

The downstream dts lists this value as 0x494, and not
0x45c.

Fixes: af776a3e1c30 ("drm/msm/dpu: add SM8250 to hw catalog")
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
index 189f3533525c..5d30c7f33930 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
@@ -244,7 +244,7 @@ static const struct dpu_mdp_cfg sc7180_mdp[] = {
 static const struct dpu_mdp_cfg sm8250_mdp[] = {
 	{
 	.name = "top_0", .id = MDP_TOP,
-	.base = 0x0, .len = 0x45C,
+	.base = 0x0, .len = 0x494,
 	.features = 0,
 	.highest_bank_bit = 0x3, /* TODO: 2 for LP_DDR4 */
 	.clk_ctrls[DPU_CLK_CTRL_VIG0] = {
-- 
2.30.2


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2021-06-28  8:50 [PATCH v1] drm/msm/dpu: Fix sm8250_mdp register length Robert Foss
2021-06-28  9:42 ` AngeloGioacchino Del Regno

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