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From: Claudiu Beznea <claudiu.beznea@microchip.com>
To: <nicolas.ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
	<ludovic.desroches@microchip.com>, <robh+dt@kernel.org>
Cc: <linux-arm-kernel@lists.infradead.org>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	Claudiu Beznea <claudiu.beznea@microchip.com>
Subject: [PATCH 0/3] ARM: dts: at91: enable ips for sama7g5
Date: Mon, 23 Aug 2021 13:03:53 +0300	[thread overview]
Message-ID: <20210823100356.22206-1-claudiu.beznea@microchip.com> (raw)

Hi,

The following patches enable UDDRC, DDR3 PHY, SECURAM and SHDWC IPs
on SAMA7G5.

Thank you,
Claudiu Beznea

Claudiu Beznea (3):
  ARM: dts: at91: add ram bindings
  ARM: dts: at91: add bindins for securam
  ARM: dts: at91: add bindings for shdwc

 arch/arm/boot/dts/at91-sama7g5ek.dts |  9 ++++++++
 arch/arm/boot/dts/sama7g5.dtsi       | 34 ++++++++++++++++++++++++++++
 2 files changed, 43 insertions(+)

-- 
2.25.1


             reply	other threads:[~2021-08-23 10:04 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-23 10:03 Claudiu Beznea [this message]
2021-08-23 10:03 ` [PATCH 1/3] ARM: dts: at91: add ram bindings Claudiu Beznea
2021-08-23 10:03 ` [PATCH 2/3] ARM: dts: at91: add bindins for securam Claudiu Beznea
2021-08-23 10:03 ` [PATCH 3/3] ARM: dts: at91: add bindings for shdwc Claudiu Beznea
2021-08-23 12:18 ` [PATCH 0/3] ARM: dts: at91: enable ips for sama7g5 Alexandre Belloni

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