From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: will@kernel.org, mathieu.poirier@linaro.org
Cc: catalin.marinas@arm.com, anshuman.khandual@arm.com,
mike.leach@linaro.org, leo.yan@linaro.org, maz@kernel.org,
coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
Suzuki K Poulose <suzuki.poulose@arm.com>
Subject: [PATCH v4 06/15] coresight: trbe: Add a helper to pad a given buffer area
Date: Tue, 12 Oct 2021 14:17:34 +0100 [thread overview]
Message-ID: <20211012131743.2040596-7-suzuki.poulose@arm.com> (raw)
In-Reply-To: <20211012131743.2040596-1-suzuki.poulose@arm.com>
Refactor the helper to pad a given AUX buffer area to allow
"filling" ignore packets, without moving any handle pointers.
This will be useful in working around errata, where we may
have to fill the buffer after a session.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Leo Yan <leo.yan@linaro.org>
Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---
drivers/hwtracing/coresight/coresight-trbe.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/hwtracing/coresight/coresight-trbe.c b/drivers/hwtracing/coresight/coresight-trbe.c
index 5902ef41bfb8..3de03136285f 100644
--- a/drivers/hwtracing/coresight/coresight-trbe.c
+++ b/drivers/hwtracing/coresight/coresight-trbe.c
@@ -199,12 +199,18 @@ static void trbe_stop_and_truncate_event(struct perf_output_handle *handle)
* consumed from the user space. The enabled TRBE buffer area is a moving subset of
* the allocated perf auxiliary buffer.
*/
+
+static void __trbe_pad_buf(struct trbe_buf *buf, u64 offset, int len)
+{
+ memset((void *)buf->trbe_base + offset, ETE_IGNORE_PACKET, len);
+}
+
static void trbe_pad_buf(struct perf_output_handle *handle, int len)
{
struct trbe_buf *buf = etm_perf_sink_config(handle);
u64 head = PERF_IDX2OFF(handle->head, buf);
- memset((void *)buf->trbe_base + head, ETE_IGNORE_PACKET, len);
+ __trbe_pad_buf(buf, head, len);
if (!buf->snapshot)
perf_aux_output_skip(handle, len);
}
--
2.25.4
next prev parent reply other threads:[~2021-10-12 13:18 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-12 13:17 [PATCH v4 00/15] arm64: Self-hosted trace related errata workarounds Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 01/15] arm64: Add Neoverse-N2, Cortex-A710 CPU part definition Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 02/15] arm64: errata: Add detection for TRBE overwrite in FILL mode Suzuki K Poulose
2021-10-12 15:31 ` Randy Dunlap
2021-10-14 14:17 ` Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 03/15] arm64: errata: Add workaround for TSB flush failures Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 04/15] arm64: errata: Add detection for TRBE write to out-of-range Suzuki K Poulose
2021-10-12 15:35 ` Randy Dunlap
2021-10-12 13:17 ` [PATCH v4 05/15] coresight: trbe: Add a helper to calculate the trace generated Suzuki K Poulose
2021-10-12 13:17 ` Suzuki K Poulose [this message]
2021-10-12 13:17 ` [PATCH v4 07/15] coresight: trbe: Decouple buffer base from the hardware base Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 08/15] coresight: trbe: Allow driver to choose a different alignment Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 09/15] coresight: trbe: Add infrastructure for Errata handling Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 10/15] coresight: trbe: Workaround TRBE errata overwrite in FILL mode Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 11/15] coresight: trbe: Add a helper to determine the minimum buffer size Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 12/15] coresight: trbe: Make sure we have enough space Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 13/15] coresight: trbe: Work around write to out of range Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 14/15] arm64: errata: Enable workaround for TRBE overwrite in FILL mode Suzuki K Poulose
2021-10-12 13:17 ` [PATCH v4 15/15] arm64: errata: Enable TRBE workaround for write to out-of-range address Suzuki K Poulose
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