* [PATCH 1/3] mmc: sdhci-pci-gli: Reduce the SSC value at 205MHz for GL9750 and GL9755
@ 2022-01-19 7:53 Ben Chuang
2022-01-24 14:41 ` Ulf Hansson
0 siblings, 1 reply; 2+ messages in thread
From: Ben Chuang @ 2022-01-19 7:53 UTC (permalink / raw)
To: adrian.hunter, ulf.hansson
Cc: linux-mmc, linux-kernel, greg.tu, ben.chuang, SeanHY.Chen, Ben Chuang
From: Ben Chuang <ben.chuang@genesyslogic.com.tw>
The SSC value is 0xFFE7 at 205MHz and may be saturated. Reduce the SSC
value to 0x5A1D at 205MHz to reduce this situation for GL9750 and GL9755.
Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
---
drivers/mmc/host/sdhci-pci-gli.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
index 4fd99c1e82ba..9ead32d73447 100644
--- a/drivers/mmc/host/sdhci-pci-gli.c
+++ b/drivers/mmc/host/sdhci-pci-gli.c
@@ -390,7 +390,7 @@ static void gl9750_set_ssc(struct sdhci_host *host, u8 enable, u8 step, u16 ppm)
static void gl9750_set_ssc_pll_205mhz(struct sdhci_host *host)
{
/* set pll to 205MHz and enable ssc */
- gl9750_set_ssc(host, 0x1, 0x1F, 0xFFE7);
+ gl9750_set_ssc(host, 0x1, 0xF, 0x5A1D);
gl9750_set_pll(host, 0x1, 0x246, 0x0);
}
@@ -533,7 +533,7 @@ static void gl9755_set_ssc(struct pci_dev *pdev, u8 enable, u8 step, u16 ppm)
static void gl9755_set_ssc_pll_205mhz(struct pci_dev *pdev)
{
/* set pll to 205MHz and enable ssc */
- gl9755_set_ssc(pdev, 0x1, 0x1F, 0xFFE7);
+ gl9755_set_ssc(pdev, 0x1, 0xF, 0x5A1D);
gl9755_set_pll(pdev, 0x1, 0x246, 0x0);
}
--
2.34.1
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH 1/3] mmc: sdhci-pci-gli: Reduce the SSC value at 205MHz for GL9750 and GL9755
2022-01-19 7:53 [PATCH 1/3] mmc: sdhci-pci-gli: Reduce the SSC value at 205MHz for GL9750 and GL9755 Ben Chuang
@ 2022-01-24 14:41 ` Ulf Hansson
0 siblings, 0 replies; 2+ messages in thread
From: Ulf Hansson @ 2022-01-24 14:41 UTC (permalink / raw)
To: Ben Chuang
Cc: adrian.hunter, linux-mmc, linux-kernel, greg.tu, ben.chuang, SeanHY.Chen
On Wed, 19 Jan 2022 at 08:53, Ben Chuang <benchuanggli@gmail.com> wrote:
>
> From: Ben Chuang <ben.chuang@genesyslogic.com.tw>
>
> The SSC value is 0xFFE7 at 205MHz and may be saturated. Reduce the SSC
> value to 0x5A1D at 205MHz to reduce this situation for GL9750 and GL9755.
>
> Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Applied for next, thanks!
Kind regards
Uffe
> ---
> drivers/mmc/host/sdhci-pci-gli.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c
> index 4fd99c1e82ba..9ead32d73447 100644
> --- a/drivers/mmc/host/sdhci-pci-gli.c
> +++ b/drivers/mmc/host/sdhci-pci-gli.c
> @@ -390,7 +390,7 @@ static void gl9750_set_ssc(struct sdhci_host *host, u8 enable, u8 step, u16 ppm)
> static void gl9750_set_ssc_pll_205mhz(struct sdhci_host *host)
> {
> /* set pll to 205MHz and enable ssc */
> - gl9750_set_ssc(host, 0x1, 0x1F, 0xFFE7);
> + gl9750_set_ssc(host, 0x1, 0xF, 0x5A1D);
> gl9750_set_pll(host, 0x1, 0x246, 0x0);
> }
>
> @@ -533,7 +533,7 @@ static void gl9755_set_ssc(struct pci_dev *pdev, u8 enable, u8 step, u16 ppm)
> static void gl9755_set_ssc_pll_205mhz(struct pci_dev *pdev)
> {
> /* set pll to 205MHz and enable ssc */
> - gl9755_set_ssc(pdev, 0x1, 0x1F, 0xFFE7);
> + gl9755_set_ssc(pdev, 0x1, 0xF, 0x5A1D);
> gl9755_set_pll(pdev, 0x1, 0x246, 0x0);
> }
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 2+ messages in thread
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2022-01-19 7:53 [PATCH 1/3] mmc: sdhci-pci-gli: Reduce the SSC value at 205MHz for GL9750 and GL9755 Ben Chuang
2022-01-24 14:41 ` Ulf Hansson
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