From: Hari Prasath <Hari.PrasathGE@microchip.com>
To: <nicolas.ferre@microchip.com>, <claudiu.beznea@microchip.com>,
<davem@davemloft.net>, <alexandre.belloni@bootlin.com>,
<ludovic.desroches@microchip.com>, <robh+dt@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux@armlinux.org.uk>
Cc: <Hari.PrasathGE@microchip.com>
Subject: [PATCH] 1/3] ARM: dts: at91: sama7g5: Restrict ns_sram
Date: Tue, 22 Feb 2022 17:09:22 +0530 [thread overview]
Message-ID: <20220222113924.25799-1-Hari.PrasathGE@microchip.com> (raw)
Limit the size of SRAM available for the rest of kernel via genalloc API's to
13k. The rest of the SRAM is used by CAN controllers and hence this restriction.
Signed-off-by: Hari Prasath <Hari.PrasathGE@microchip.com>
---
arch/arm/boot/dts/sama7g5.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
index eddcfbf4d223..6c7012f74b10 100644
--- a/arch/arm/boot/dts/sama7g5.dtsi
+++ b/arch/arm/boot/dts/sama7g5.dtsi
@@ -65,7 +65,7 @@
compatible = "mmio-sram";
#address-cells = <1>;
#size-cells = <1>;
- reg = <0x100000 0x20000>;
+ reg = <0x100000 0x3400>;
ranges;
};
--
2.17.1
next reply other threads:[~2022-02-22 11:39 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-22 11:39 Hari Prasath [this message]
2022-02-22 11:39 ` [PATCH] 2/3] ARM: dts: at91: sama7g5: Add can controllers of sama7g5 Hari Prasath
2022-02-22 11:39 ` [PATCH] 3/3] ARM: dts: at91: sama7g5: Enable can0 and can1 support in sama7g5-ek Hari Prasath
2022-02-22 20:46 ` [PATCH] 1/3] ARM: dts: at91: sama7g5: Restrict ns_sram Alexandre Belloni
2022-02-24 15:47 ` Nicolas Ferre
2022-02-24 17:50 ` Alexandre Belloni
2022-02-24 15:50 ` Nicolas Ferre
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