[PATCH v1 09/10] arm64: dts: imx8mm-verdin: note about disabled sd1 pull-ups

[Marcel Ziswiler <marcel@ziswiler.com>]

From: Marcel Ziswiler <marcel.ziswiler@toradex.com>

Add a note about us using discrete external on-module resistors
pulling-up to the on-module +V3.3_1.8_SD (LDO5) rail and explicitly
disabling the internal pull-ups due to ERR050080 [1]:

IO: Degradation of internal IO pullup/pulldown current capability for
IO’s continuously driven in a 3.3V operating mode

[1] https://www.nxp.com/webapp/Download?colCode=IMX8MM_0N87W

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
---

 arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
index 6e1c762fd2e7..97dd7a00d63b 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi
@@ -1179,6 +1179,10 @@ pinctrl_usdhc2_pwr_en: usdhc2pwrengrp {
 			<MX8MM_IOMUXC_NAND_CLE_GPIO3_IO5		0x6>;	/* SODIMM 76 */
 	};
 
+	/*
+	 * Note: Due to ERR050080 we use discrete external on-module resistors pulling-up to the
+	 * on-module +V3.3_1.8_SD (LDO5) rail and explicitly disable the internal pull-ups here.
+	 */
 	pinctrl_usdhc2: usdhc2grp {
 		fsl,pins =
 			<MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x10>,
-- 
2.34.1