* [PATCH 0/2] MediaTek Helio X10 MT6795 - CQDMA driver @ 2022-05-03 10:53 AngeloGioacchino Del Regno 2022-05-03 10:53 ` [PATCH 1/2] dmaengine: mediatek-cqdma: Add SoC-specific match data AngeloGioacchino Del Regno 2022-05-03 10:53 ` [PATCH 2/2] dmaengine: mediatek-cqdma: Add support for MediaTek MT6795 AngeloGioacchino Del Regno 0 siblings, 2 replies; 4+ messages in thread From: AngeloGioacchino Del Regno @ 2022-05-03 10:53 UTC (permalink / raw) To: sean.wang Cc: vkoul, matthias.bgg, dmaengine, linux-arm-kernel, linux-mediatek, linux-kernel, kernel, nfraprado, AngeloGioacchino Del Regno In an effort to give some love to the apparently forgotten MT6795 SoC, I am upstreaming more components that are necessary to support platforms powered by this one apart from a simple boot to serial console. This series introduces support for CQDMA on the Helio X10 SoC. Tested on a Sony Xperia M5 (codename "Holly") smartphone. AngeloGioacchino Del Regno (2): dmaengine: mediatek-cqdma: Add SoC-specific match data dmaengine: mediatek-cqdma: Add support for MediaTek MT6795 drivers/dma/mediatek/mtk-cqdma.c | 40 ++++++++++++++++++++++++++------ 1 file changed, 33 insertions(+), 7 deletions(-) -- 2.35.1 ^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 1/2] dmaengine: mediatek-cqdma: Add SoC-specific match data 2022-05-03 10:53 [PATCH 0/2] MediaTek Helio X10 MT6795 - CQDMA driver AngeloGioacchino Del Regno @ 2022-05-03 10:53 ` AngeloGioacchino Del Regno 2022-05-03 13:32 ` kernel test robot 2022-05-03 10:53 ` [PATCH 2/2] dmaengine: mediatek-cqdma: Add support for MediaTek MT6795 AngeloGioacchino Del Regno 1 sibling, 1 reply; 4+ messages in thread From: AngeloGioacchino Del Regno @ 2022-05-03 10:53 UTC (permalink / raw) To: sean.wang Cc: vkoul, matthias.bgg, dmaengine, linux-arm-kernel, linux-mediatek, linux-kernel, kernel, nfraprado, AngeloGioacchino Del Regno On some SoCs the DST2 and SRC2 registers may be at a different offset: add a match data structure and assign it to mt6765 as a preparation for adding support for more SoCs. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- drivers/dma/mediatek/mtk-cqdma.c | 34 +++++++++++++++++++++++++------- 1 file changed, 27 insertions(+), 7 deletions(-) diff --git a/drivers/dma/mediatek/mtk-cqdma.c b/drivers/dma/mediatek/mtk-cqdma.c index f8847c48ba03..7d8c54da3d58 100644 --- a/drivers/dma/mediatek/mtk-cqdma.c +++ b/drivers/dma/mediatek/mtk-cqdma.c @@ -48,8 +48,6 @@ #define MTK_CQDMA_DST 0x20 #define MTK_CQDMA_LEN1 0x24 #define MTK_CQDMA_LEN2 0x28 -#define MTK_CQDMA_SRC2 0x60 -#define MTK_CQDMA_DST2 0x64 /* Registers setting */ #define MTK_CQDMA_EN_BIT BIT(0) @@ -126,9 +124,20 @@ struct mtk_cqdma_vchan { bool issue_synchronize; }; +/** + * struct mtk_cqdma_plat_data - SoC specific parameters + * @reg_dst2: dst2 register offset + * @reg_src2: src2 register offset + */ +struct mtk_cqdma_plat_data { + u8 reg_src2; + u8 reg_dst2; +}; + /** * struct mtk_cqdma_device - The struct holding info describing CQDMA * device + * @plat: SoC-specific platform data * @ddev: An instance for struct dma_device * @clk: The clock that device internal is using * @dma_requests: The number of VCs the device supports to @@ -231,6 +240,8 @@ static int mtk_cqdma_hard_reset(struct mtk_cqdma_pchan *pc) static void mtk_cqdma_start(struct mtk_cqdma_pchan *pc, struct mtk_cqdma_vdesc *cvd) { + struct mtk_cqdma_device *cqdma = to_cqma_dev(cvd->ch); + /* wait for the previous transaction done */ if (mtk_cqdma_poll_engine_done(pc, true) < 0) dev_err(cqdma2dev(to_cqdma_dev(cvd->ch)), "cqdma wait transaction timeout\n"); @@ -243,17 +254,17 @@ static void mtk_cqdma_start(struct mtk_cqdma_pchan *pc, /* setup the source */ mtk_dma_set(pc, MTK_CQDMA_SRC, cvd->src & MTK_CQDMA_ADDR_LIMIT); #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT - mtk_dma_set(pc, MTK_CQDMA_SRC2, cvd->src >> MTK_CQDMA_ADDR2_SHFIT); + mtk_dma_set(pc, cqdma->plat->reg_src2, cvd->src >> MTK_CQDMA_ADDR2_SHFIT); #else - mtk_dma_set(pc, MTK_CQDMA_SRC2, 0); + mtk_dma_set(pc, cqdma->plat->reg_src2, 0); #endif /* setup the destination */ mtk_dma_set(pc, MTK_CQDMA_DST, cvd->dest & MTK_CQDMA_ADDR_LIMIT); #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT - mtk_dma_set(pc, MTK_CQDMA_DST2, cvd->dest >> MTK_CQDMA_ADDR2_SHFIT); + mtk_dma_set(pc, cqdma->plat->reg_dst2, cvd->dest >> MTK_CQDMA_ADDR2_SHFIT); #else - mtk_dma_set(pc, MTK_CQDMA_DST2, 0); + mtk_dma_set(pc, cqdma->plat->reg_dst2, 0); #endif /* setup the length */ @@ -740,8 +751,13 @@ static void mtk_cqdma_hw_deinit(struct mtk_cqdma_device *cqdma) pm_runtime_disable(cqdma2dev(cqdma)); } +static const struct mtk_cqdma_plat_data cqdma_mt6765 { + .reg_dst2 = 0x64, + .reg_src2 = 0x60, +}; + static const struct of_device_id mtk_cqdma_match[] = { - { .compatible = "mediatek,mt6765-cqdma" }, + { .compatible = "mediatek,mt6765-cqdma", .data = &cqdma_mt6765 }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, mtk_cqdma_match); @@ -758,6 +774,10 @@ static int mtk_cqdma_probe(struct platform_device *pdev) if (!cqdma) return -ENOMEM; + cqdma->plat = device_get_match_data(&pdev->dev); + if (cqdma->plat) + return -EINVAL; + dd = &cqdma->ddev; cqdma->clk = devm_clk_get(&pdev->dev, "cqdma"); -- 2.35.1 ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 1/2] dmaengine: mediatek-cqdma: Add SoC-specific match data 2022-05-03 10:53 ` [PATCH 1/2] dmaengine: mediatek-cqdma: Add SoC-specific match data AngeloGioacchino Del Regno @ 2022-05-03 13:32 ` kernel test robot 0 siblings, 0 replies; 4+ messages in thread From: kernel test robot @ 2022-05-03 13:32 UTC (permalink / raw) To: AngeloGioacchino Del Regno, sean.wang Cc: kbuild-all, vkoul, matthias.bgg, dmaengine, linux-arm-kernel, linux-mediatek, linux-kernel, kernel, nfraprado, AngeloGioacchino Del Regno Hi AngeloGioacchino, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on vkoul-dmaengine/next] [also build test WARNING on v5.18-rc5 next-20220503] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/intel-lab-lkp/linux/commits/AngeloGioacchino-Del-Regno/MediaTek-Helio-X10-MT6795-CQDMA-driver/20220503-185610 base: https://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git next config: mips-allyesconfig (https://download.01.org/0day-ci/archive/20220503/202205032104.sDnKlXcO-lkp@intel.com/config) compiler: mips-linux-gcc (GCC) 11.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel-lab-lkp/linux/commit/1516c04b4553b4a3037e86dada37c202af23e4b3 git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review AngeloGioacchino-Del-Regno/MediaTek-Helio-X10-MT6795-CQDMA-driver/20220503-185610 git checkout 1516c04b4553b4a3037e86dada37c202af23e4b3 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.3.0 make.cross W=1 O=build_dir ARCH=mips SHELL=/bin/bash drivers/dma/mediatek/ If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com> All warnings (new ones prefixed by >>): drivers/dma/mediatek/mtk-cqdma.c: In function 'mtk_cqdma_start': drivers/dma/mediatek/mtk-cqdma.c:243:42: error: implicit declaration of function 'to_cqma_dev'; did you mean 'to_cqdma_dev'? [-Werror=implicit-function-declaration] 243 | struct mtk_cqdma_device *cqdma = to_cqma_dev(cvd->ch); | ^~~~~~~~~~~ | to_cqdma_dev >> drivers/dma/mediatek/mtk-cqdma.c:243:42: warning: initialization of 'struct mtk_cqdma_device *' from 'int' makes pointer from integer without a cast [-Wint-conversion] drivers/dma/mediatek/mtk-cqdma.c:259:30: error: 'struct mtk_cqdma_device' has no member named 'plat' 259 | mtk_dma_set(pc, cqdma->plat->reg_src2, 0); | ^~ drivers/dma/mediatek/mtk-cqdma.c:267:30: error: 'struct mtk_cqdma_device' has no member named 'plat' 267 | mtk_dma_set(pc, cqdma->plat->reg_dst2, 0); | ^~ drivers/dma/mediatek/mtk-cqdma.c: At top level: drivers/dma/mediatek/mtk-cqdma.c:754:54: error: expected '=', ',', ';', 'asm' or '__attribute__' before '{' token 754 | static const struct mtk_cqdma_plat_data cqdma_mt6765 { | ^ drivers/dma/mediatek/mtk-cqdma.c:760:59: error: 'cqdma_mt6765' undeclared here (not in a function) 760 | { .compatible = "mediatek,mt6765-cqdma", .data = &cqdma_mt6765 }, | ^~~~~~~~~~~~ drivers/dma/mediatek/mtk-cqdma.c: In function 'mtk_cqdma_probe': drivers/dma/mediatek/mtk-cqdma.c:777:14: error: 'struct mtk_cqdma_device' has no member named 'plat' 777 | cqdma->plat = device_get_match_data(&pdev->dev); | ^~ drivers/dma/mediatek/mtk-cqdma.c:778:18: error: 'struct mtk_cqdma_device' has no member named 'plat' 778 | if (cqdma->plat) | ^~ cc1: some warnings being treated as errors vim +243 drivers/dma/mediatek/mtk-cqdma.c 239 240 static void mtk_cqdma_start(struct mtk_cqdma_pchan *pc, 241 struct mtk_cqdma_vdesc *cvd) 242 { > 243 struct mtk_cqdma_device *cqdma = to_cqma_dev(cvd->ch); 244 245 /* wait for the previous transaction done */ 246 if (mtk_cqdma_poll_engine_done(pc, true) < 0) 247 dev_err(cqdma2dev(to_cqdma_dev(cvd->ch)), "cqdma wait transaction timeout\n"); 248 249 /* warm reset the dma engine for the new transaction */ 250 mtk_dma_set(pc, MTK_CQDMA_RESET, MTK_CQDMA_WARM_RST_BIT); 251 if (mtk_cqdma_poll_engine_done(pc, true) < 0) 252 dev_err(cqdma2dev(to_cqdma_dev(cvd->ch)), "cqdma warm reset timeout\n"); 253 254 /* setup the source */ 255 mtk_dma_set(pc, MTK_CQDMA_SRC, cvd->src & MTK_CQDMA_ADDR_LIMIT); 256 #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT 257 mtk_dma_set(pc, cqdma->plat->reg_src2, cvd->src >> MTK_CQDMA_ADDR2_SHFIT); 258 #else 259 mtk_dma_set(pc, cqdma->plat->reg_src2, 0); 260 #endif 261 262 /* setup the destination */ 263 mtk_dma_set(pc, MTK_CQDMA_DST, cvd->dest & MTK_CQDMA_ADDR_LIMIT); 264 #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT 265 mtk_dma_set(pc, cqdma->plat->reg_dst2, cvd->dest >> MTK_CQDMA_ADDR2_SHFIT); 266 #else 267 mtk_dma_set(pc, cqdma->plat->reg_dst2, 0); 268 #endif 269 270 /* setup the length */ 271 mtk_dma_set(pc, MTK_CQDMA_LEN1, cvd->len); 272 273 /* start dma engine */ 274 mtk_dma_set(pc, MTK_CQDMA_EN, MTK_CQDMA_EN_BIT); 275 } 276 -- 0-DAY CI Kernel Test Service https://01.org/lkp ^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 2/2] dmaengine: mediatek-cqdma: Add support for MediaTek MT6795 2022-05-03 10:53 [PATCH 0/2] MediaTek Helio X10 MT6795 - CQDMA driver AngeloGioacchino Del Regno 2022-05-03 10:53 ` [PATCH 1/2] dmaengine: mediatek-cqdma: Add SoC-specific match data AngeloGioacchino Del Regno @ 2022-05-03 10:53 ` AngeloGioacchino Del Regno 1 sibling, 0 replies; 4+ messages in thread From: AngeloGioacchino Del Regno @ 2022-05-03 10:53 UTC (permalink / raw) To: sean.wang Cc: vkoul, matthias.bgg, dmaengine, linux-arm-kernel, linux-mediatek, linux-kernel, kernel, nfraprado, AngeloGioacchino Del Regno Add a compatible string and platform data for the Helio X10 MT6795 SoC. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- drivers/dma/mediatek/mtk-cqdma.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/dma/mediatek/mtk-cqdma.c b/drivers/dma/mediatek/mtk-cqdma.c index 7d8c54da3d58..5f8f44d37037 100644 --- a/drivers/dma/mediatek/mtk-cqdma.c +++ b/drivers/dma/mediatek/mtk-cqdma.c @@ -756,8 +756,14 @@ static const struct mtk_cqdma_plat_data cqdma_mt6765 { .reg_src2 = 0x60, }; +static const struct mtk_cqdma_plat_data cqdma_mt6795 { + .reg_dst2 = 0x44, + .reg_src2 = 0x40, +}; + static const struct of_device_id mtk_cqdma_match[] = { { .compatible = "mediatek,mt6765-cqdma", .data = &cqdma_mt6765 }, + { .compatible = "mediatek,mt6795-cqdma", .data = &cqdma_mt6795 }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, mtk_cqdma_match); -- 2.35.1 ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2022-05-03 13:33 UTC | newest] Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-05-03 10:53 [PATCH 0/2] MediaTek Helio X10 MT6795 - CQDMA driver AngeloGioacchino Del Regno 2022-05-03 10:53 ` [PATCH 1/2] dmaengine: mediatek-cqdma: Add SoC-specific match data AngeloGioacchino Del Regno 2022-05-03 13:32 ` kernel test robot 2022-05-03 10:53 ` [PATCH 2/2] dmaengine: mediatek-cqdma: Add support for MediaTek MT6795 AngeloGioacchino Del Regno
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