[PATCH 0/2] Fixes for TC358775 DSI to LVDS bridge

[PATCH 0/2] Fixes for TC358775 DSI to LVDS bridge

[Jiri Vanek]

This patchset fixes two bugs in the driver for TC358775 DSI to LVDS bridge.

Jiri Vanek (2):
  drm/bridge/tc358775: Return before displaying inappropriate error
    message
  drm/bridge/tc358775: Fix DSI clock division for vsync delay
    calculation

 drivers/gpu/drm/bridge/tc358775.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

-- 
2.30.2

[PATCH 1/2] drm/bridge/tc358775: Return before displaying inappropriate error message

[Jiri Vanek]

Function for reading from i2c device register displays error message even
if reading ends correctly. Add return to avoid falling through into
the fail label.

Signed-off-by: Jiri Vanek <jirivanek1@gmail.com>
---
 drivers/gpu/drm/bridge/tc358775.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc358775.c
index 62a7ef352daa..cd2721ab02a9 100644
--- a/drivers/gpu/drm/bridge/tc358775.c
+++ b/drivers/gpu/drm/bridge/tc358775.c
@@ -339,6 +339,7 @@ static void d2l_read(struct i2c_client *i2c, u16 addr, u32 *val)
 		goto fail;
 
 	pr_debug("d2l: I2C : addr:%04x value:%08x\n", addr, *val);
+	return;
 
 fail:
 	dev_err(&i2c->dev, "Error %d reading from subaddress 0x%x\n",
-- 
2.30.2

[PATCH 2/2] drm/bridge/tc358775: Fix DSI clock division for vsync delay calculation

[Jiri Vanek]

Use the same PCLK divide option (divide DSI clock to generate pixel clock)
which is set to LVDS Configuration Register (LVCFG) also for a VSync delay
calculation. Without this change an auxiliary variable could underflow
during the calculation for some dual-link LVDS panels and then calculated
VSync delay is wrong. This leads to a shifted picture on a panel.

Tested-by: Jiri Vanek <jirivanek1@gmail.com>
Signed-off-by: Jiri Vanek <jirivanek1@gmail.com>
---
 drivers/gpu/drm/bridge/tc358775.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/tc358775.c b/drivers/gpu/drm/bridge/tc358775.c
index cd2721ab02a9..fecb8558b49a 100644
--- a/drivers/gpu/drm/bridge/tc358775.c
+++ b/drivers/gpu/drm/bridge/tc358775.c
@@ -430,7 +430,7 @@ static void tc_bridge_enable(struct drm_bridge *bridge)
 		val = TC358775_VPCTRL_MSF(1);
 
 	dsiclk = mode->crtc_clock * 3 * tc->bpc / tc->num_dsi_lanes / 1000;
-	clkdiv = dsiclk / DIVIDE_BY_3 * tc->lvds_link;
+	clkdiv = dsiclk / (tc->lvds_link == DUAL_LINK ? DIVIDE_BY_6 : DIVIDE_BY_3);
 	byteclk = dsiclk / 4;
 	t1 = hactive * (tc->bpc * 3 / 8) / tc->num_dsi_lanes;
 	t2 = ((100000 / clkdiv)) * (hactive + hback_porch + hsync_len + hfront_porch) / 1000;
-- 
2.30.2

Re: [PATCH 0/2] Fixes for TC358775 DSI to LVDS bridge

[Robert Foss]

On Thu, 16 Jun 2022 at 00:25, Jiri Vanek <jirivanek1@gmail.com> wrote:
>
> This patchset fixes two bugs in the driver for TC358775 DSI to LVDS bridge.
>
> Jiri Vanek (2):
>   drm/bridge/tc358775: Return before displaying inappropriate error
>     message
>   drm/bridge/tc358775: Fix DSI clock division for vsync delay
>     calculation
>
>  drivers/gpu/drm/bridge/tc358775.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>

Applied to drm-misc-next.