From: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
To: <linux-kernel@vger.kernel.org>, <iommu@lists.linux-foundation.org>
Cc: <joro@8bytes.org>, <robin.murphy@arm.com>, <ashish.kalra@amd.com>,
<vasant.hegde@amd.com>, <thomas.lendacky@amd.com>,
Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Subject: [PATCH v3 1/7] iommu/amd: Warn when found inconsistency EFR mask
Date: Wed, 22 Jun 2022 12:11:25 -0500 [thread overview]
Message-ID: <20220622171131.11870-2-suravee.suthikulpanit@amd.com> (raw)
In-Reply-To: <20220622171131.11870-1-suravee.suthikulpanit@amd.com>
The function check_feature_on_all_iommus() checks to ensure if an IOMMU
feature support bit is set on the Extended Feature Register (EFR).
Current logic iterates through all IOMMU, and returns false when it
found the first unset bit.
To provide more thorough checking, modify the logic to iterate through all
IOMMUs even when found that the bit is not set, and also throws a FW_BUG
warning if inconsistency is found.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
---
drivers/iommu/amd/init.c | 19 +++++++++++++++----
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c
index 3dd0f26039c7..b3e4551ce9dd 100644
--- a/drivers/iommu/amd/init.c
+++ b/drivers/iommu/amd/init.c
@@ -261,18 +261,29 @@ int amd_iommu_get_num_iommus(void)
}
#ifdef CONFIG_IRQ_REMAP
+/*
+ * Iterate through all the IOMMUs to verify if the specified
+ * EFR bitmask of IOMMU feature are set.
+ * Warn and return false if found inconsistency.
+ */
static bool check_feature_on_all_iommus(u64 mask)
{
bool ret = false;
struct amd_iommu *iommu;
for_each_iommu(iommu) {
- ret = iommu_feature(iommu, mask);
- if (!ret)
+ bool tmp = iommu_feature(iommu, mask);
+
+ if ((ret != tmp) &&
+ !list_is_first(&iommu->list, &amd_iommu_list)) {
+ pr_err(FW_BUG "Found inconsistent EFR mask (%#llx) on iommu%d (%04x:%02x:%02x.%01x).\n",
+ mask, iommu->index, iommu->pci_seg->id, PCI_BUS_NUM(iommu->devid),
+ PCI_SLOT(iommu->devid), PCI_FUNC(iommu->devid));
return false;
+ }
+ ret = tmp;
}
-
- return true;
+ return ret;
}
#endif
--
2.32.0
next prev parent reply other threads:[~2022-06-22 17:12 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-22 17:11 [PATCH v3 0/7] iommu/amd: Enforce IOMMU restrictions for SNP-enabled system Suravee Suthikulpanit
2022-06-22 17:11 ` Suravee Suthikulpanit [this message]
2022-06-23 8:22 ` [PATCH v3 1/7] iommu/amd: Warn when found inconsistency EFR mask Joerg Roedel
2022-06-29 11:50 ` Suthikulpanit, Suravee
2022-06-22 17:11 ` [PATCH v3 2/7] iommu/amd: Process all IVHDs before enabling IOMMU features Suravee Suthikulpanit
2022-06-22 17:11 ` [PATCH v3 3/7] iommu/amd: Introduce an iommu variable for tracking SNP support status Suravee Suthikulpanit
2022-06-22 17:11 ` [PATCH v3 4/7] iommu/amd: Introduce function to check and enable SNP Suravee Suthikulpanit
2022-06-22 17:11 ` [PATCH v3 5/7] iommu/amd: Set translation valid bit only when IO page tables are in use Suravee Suthikulpanit
2022-06-22 17:11 ` [PATCH v3 6/7] iommu/amd: Do not support IOMMU_DOMAIN_IDENTITY after SNP is enabled Suravee Suthikulpanit
2022-06-22 17:11 ` [PATCH v3 7/7] iommu/amd: Do not support IOMMUv2 APIs when " Suravee Suthikulpanit
2022-06-23 8:23 ` Joerg Roedel
2022-06-29 11:54 ` Suthikulpanit, Suravee
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