[atishp04:sstc_v5 4/5] drivers/clocksource/timer-riscv.c:185:6: error: call to undeclared function 'riscv_isa_extension_available'; ISO C99 and later do not support implicit function declarations

[atishp04:sstc_v5 4/5] drivers/clocksource/timer-riscv.c:185:6: error: call to undeclared function 'riscv_isa_extension_available'; ISO C99 and later do not support implicit function declarations

[kernel test robot]

tree:   https://github.com/atishp04/linux sstc_v5
head:   1b65346e11303beea1c67b3557ae56aee68e7a57
commit: 69d668ba2592b6ce82b8d08c327097ccfd69b600 [4/5] RISC-V: Prefer sstc extension if available
config: riscv-randconfig-r002-20220718 (https://download.01.org/0day-ci/archive/20220725/202207250359.HbTGzcp8-lkp@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 0c1b32717bcffcf8edf95294e98933bd4c1e76ed)
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install riscv cross compiling tool for clang build
        # apt-get install binutils-riscv-linux-gnu
        # https://github.com/atishp04/linux/commit/69d668ba2592b6ce82b8d08c327097ccfd69b600
        git remote add atishp04 https://github.com/atishp04/linux
        git fetch --no-tags atishp04 sstc_v5
        git checkout 69d668ba2592b6ce82b8d08c327097ccfd69b600
        # save the config file
        mkdir build_dir && cp config build_dir/.config
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 O=build_dir ARCH=riscv SHELL=/bin/bash drivers/clocksource/

If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>

All errors (new ones prefixed by >>):

>> drivers/clocksource/timer-riscv.c:185:6: error: call to undeclared function 'riscv_isa_extension_available'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
           if (riscv_isa_extension_available(NULL, SSTC)) {
               ^
>> drivers/clocksource/timer-riscv.c:185:42: error: use of undeclared identifier 'SSTC'
           if (riscv_isa_extension_available(NULL, SSTC)) {
                                                   ^
   2 errors generated.


vim +/riscv_isa_extension_available +185 drivers/clocksource/timer-riscv.c

   117	
   118	static int __init riscv_timer_init_dt(struct device_node *n)
   119	{
   120		int cpuid, hartid, error;
   121		struct device_node *child;
   122		struct irq_domain *domain;
   123	
   124		hartid = riscv_of_processor_hartid(n);
   125		if (hartid < 0) {
   126			pr_warn("Not valid hartid for node [%pOF] error = [%d]\n",
   127				n, hartid);
   128			return hartid;
   129		}
   130	
   131		cpuid = riscv_hartid_to_cpuid(hartid);
   132		if (cpuid < 0) {
   133			pr_warn("Invalid cpuid for hartid [%d]\n", hartid);
   134			return cpuid;
   135		}
   136	
   137		if (cpuid != smp_processor_id())
   138			return 0;
   139	
   140		domain = NULL;
   141		child = of_get_compatible_child(n, "riscv,cpu-intc");
   142		if (!child) {
   143			pr_err("Failed to find INTC node [%pOF]\n", n);
   144			return -ENODEV;
   145		}
   146		domain = irq_find_host(child);
   147		of_node_put(child);
   148		if (!domain) {
   149			pr_err("Failed to find IRQ domain for node [%pOF]\n", n);
   150			return -ENODEV;
   151		}
   152	
   153		riscv_clock_event_irq = irq_create_mapping(domain, RV_IRQ_TIMER);
   154		if (!riscv_clock_event_irq) {
   155			pr_err("Failed to map timer interrupt for node [%pOF]\n", n);
   156			return -ENODEV;
   157		}
   158	
   159		pr_info("%s: Registering clocksource cpuid [%d] hartid [%d]\n",
   160		       __func__, cpuid, hartid);
   161		error = clocksource_register_hz(&riscv_clocksource, riscv_timebase);
   162		if (error) {
   163			pr_err("RISCV timer register failed [%d] for cpu = [%d]\n",
   164			       error, cpuid);
   165			return error;
   166		}
   167	
   168		sched_clock_register(riscv_sched_clock, 64, riscv_timebase);
   169	
   170		error = request_percpu_irq(riscv_clock_event_irq,
   171					    riscv_timer_interrupt,
   172					    "riscv-timer", &riscv_clock_event);
   173		if (error) {
   174			pr_err("registering percpu irq failed [%d]\n", error);
   175			return error;
   176		}
   177	
   178		error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
   179				 "clockevents/riscv/timer:starting",
   180				 riscv_timer_starting_cpu, riscv_timer_dying_cpu);
   181		if (error)
   182			pr_err("cpu hp setup state failed for RISCV timer [%d]\n",
   183			       error);
   184	
 > 185		if (riscv_isa_extension_available(NULL, SSTC)) {
   186			pr_info("Timer interrupt in S-mode is available via sstc extension\n");
   187			static_branch_enable(&riscv_sstc_available);
   188		}
   189	
   190		return error;
   191	}
   192	

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