From: Brad Larson <brad@pensando.io>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org,
adrian.hunter@intel.com, alcooperx@gmail.com,
andy.shevchenko@gmail.com, arnd@arndb.de, brad@pensando.io,
blarson@amd.com, brijeshkumar.singh@amd.com,
catalin.marinas@arm.com, gsomlo@gmail.com, gerg@linux-m68k.org,
krzk@kernel.org, krzysztof.kozlowski+dt@linaro.org,
lee.jones@linaro.org, broonie@kernel.org,
yamada.masahiro@socionext.com, p.zabel@pengutronix.de,
piotrs@cadence.com, p.yadav@ti.com, rdunlap@infradead.org,
robh+dt@kernel.org, samuel@sholland.org, fancer.lancer@gmail.com,
suravee.suthikulpanit@amd.com, thomas.lendacky@amd.com,
ulf.hansson@linaro.org, will@kernel.org,
devicetree@vger.kernel.org
Subject: [PATCH v6 12/17] spi: dw: Add support for AMD Pensando Elba SoC
Date: Sat, 20 Aug 2022 12:57:45 -0700 [thread overview]
Message-ID: <20220820195750.70861-13-brad@pensando.io> (raw)
In-Reply-To: <20220820195750.70861-1-brad@pensando.io>
From: Brad Larson <blarson@amd.com>
The AMD Pensando Elba SoC includes a DW apb_ssi v4 controller
with device specific chip-select control. The Elba SoC
provides four chip-selects where the native DW IP supports
two chip-selects. The Elba DW_SPI instance has two native
CS signals that are always overridden.
Signed-off-by: Brad Larson <blarson@amd.com>
---
drivers/spi/spi-dw-mmio.c | 77 +++++++++++++++++++++++++++++++++++++++
1 file changed, 77 insertions(+)
diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c
index 26c40ea6dd12..36b8c5e10bb3 100644
--- a/drivers/spi/spi-dw-mmio.c
+++ b/drivers/spi/spi-dw-mmio.c
@@ -53,6 +53,24 @@ struct dw_spi_mscc {
void __iomem *spi_mst; /* Not sparx5 */
};
+struct dw_spi_elba {
+ struct regmap *syscon;
+};
+
+/*
+ * Elba SoC does not use ssi, pin override is used for cs 0,1 and
+ * gpios for cs 2,3 as defined in the device tree.
+ *
+ * cs: | 1 0
+ * bit: |---3-------2-------1-------0
+ * | cs1 cs1_ovr cs0 cs0_ovr
+ */
+#define ELBA_SPICS_REG 0x2468
+#define ELBA_SPICS_SHIFT(cs) (2 * (cs))
+#define ELBA_SPICS_MASK(cs) (0x3 << ELBA_SPICS_SHIFT(cs))
+#define ELBA_SPICS_SET(cs, val) \
+ ((((val) << 1) | 0x1) << ELBA_SPICS_SHIFT(cs))
+
/*
* The Designware SPI controller (referred to as master in the documentation)
* automatically deasserts chip select when the tx fifo is empty. The chip
@@ -237,6 +255,64 @@ static int dw_spi_canaan_k210_init(struct platform_device *pdev,
return 0;
}
+static void dw_spi_elba_override_cs(struct dw_spi_elba *dwselba, int cs, int enable)
+{
+ regmap_update_bits(dwselba->syscon, ELBA_SPICS_REG, ELBA_SPICS_MASK(cs),
+ ELBA_SPICS_SET(cs, enable));
+}
+
+static void dw_spi_elba_set_cs(struct spi_device *spi, bool enable)
+{
+ struct dw_spi *dws = spi_master_get_devdata(spi->master);
+ struct dw_spi_mmio *dwsmmio = container_of(dws, struct dw_spi_mmio, dws);
+ struct dw_spi_elba *dwselba = dwsmmio->priv;
+ u8 cs;
+
+ cs = spi->chip_select;
+ if (cs < 2)
+ dw_spi_elba_override_cs(dwselba, spi->chip_select, enable);
+
+ /*
+ * The DW SPI controller needs a native CS bit selected to start
+ * the serial engine.
+ */
+ spi->chip_select = 0;
+ dw_spi_set_cs(spi, enable);
+ spi->chip_select = cs;
+}
+
+static int dw_spi_elba_init(struct platform_device *pdev,
+ struct dw_spi_mmio *dwsmmio)
+{
+ const char *syscon_name = "amd,pensando-elba-syscon";
+ struct device_node *np = pdev->dev.of_node;
+ struct device_node *node;
+ struct dw_spi_elba *dwselba;
+ struct regmap *regmap;
+
+ node = of_parse_phandle(np, syscon_name, 0);
+ if (!node) {
+ dev_err(&pdev->dev, "failed to find %s\n", syscon_name);
+ return -ENODEV;
+ }
+
+ regmap = syscon_node_to_regmap(node);
+ if (IS_ERR(regmap)) {
+ dev_err(&pdev->dev, "syscon regmap lookup failed\n");
+ return PTR_ERR(regmap);
+ }
+
+ dwselba = devm_kzalloc(&pdev->dev, sizeof(*dwselba), GFP_KERNEL);
+ if (!dwselba)
+ return -ENOMEM;
+
+ dwselba->syscon = regmap;
+ dwsmmio->priv = dwselba;
+ dwsmmio->dws.set_cs = dw_spi_elba_set_cs;
+
+ return 0;
+}
+
static int dw_spi_mmio_probe(struct platform_device *pdev)
{
int (*init_func)(struct platform_device *pdev,
@@ -352,6 +428,7 @@ static const struct of_device_id dw_spi_mmio_of_match[] = {
{ .compatible = "intel,thunderbay-ssi", .data = dw_spi_intel_init},
{ .compatible = "microchip,sparx5-spi", dw_spi_mscc_sparx5_init},
{ .compatible = "canaan,k210-spi", dw_spi_canaan_k210_init},
+ { .compatible = "amd,pensando-elba-spi", .data = dw_spi_elba_init},
{ /* end of table */}
};
MODULE_DEVICE_TABLE(of, dw_spi_mmio_of_match);
--
2.17.1
next prev parent reply other threads:[~2022-08-20 19:59 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-20 19:57 [PATCH v6 00/17] Support " Brad Larson
2022-08-20 19:57 ` [PATCH v6 01/17] dt-bindings: arm: add AMD Pensando boards Brad Larson
2022-08-22 18:15 ` Krzysztof Kozlowski
2022-08-31 22:40 ` Larson, Bradley
2022-08-20 19:57 ` [PATCH v6 02/17] dt-bindings: mmc: cdns: Add AMD Pensando Elba SoC Brad Larson
2022-08-22 21:29 ` Rob Herring
2022-08-31 22:36 ` Larson, Bradley
2022-08-20 19:57 ` [PATCH v6 03/17] dt-bindings: spi: cdns: Add compatible for " Brad Larson
2022-08-22 18:22 ` Krzysztof Kozlowski
2022-08-31 18:37 ` Larson, Bradley
2022-08-20 19:57 ` [PATCH v6 04/17] dt-bindings: spi: dw: Add AMD Pensando Elba SoC SPI Controller bindings Brad Larson
2022-08-21 17:49 ` Serge Semin
2022-08-31 18:28 ` Larson, Bradley
2022-09-11 18:34 ` Serge Semin
2022-09-14 18:47 ` Larson, Bradley
2022-08-22 18:19 ` Krzysztof Kozlowski
2022-08-31 18:45 ` Larson, Bradley
2022-08-20 19:57 ` [PATCH v6 05/17] dt-bindings: mfd: syscon: Add amd,pensando-elba-syscon compatible Brad Larson
2022-08-22 18:23 ` Krzysztof Kozlowski
2022-08-31 18:35 ` Larson, Bradley
2022-08-20 19:57 ` [PATCH v6 06/17] dt-bindings: mfd: amd,pensando-elbasr: Add AMD Pensando Elba System Resource chip Brad Larson
2022-08-21 20:21 ` Rob Herring
2022-08-22 14:25 ` Rob Herring
2022-08-31 23:01 ` Larson, Bradley
2022-09-01 7:20 ` Krzysztof Kozlowski
2022-09-01 20:37 ` Larson, Bradley
2022-09-08 11:27 ` Krzysztof Kozlowski
2022-09-13 21:57 ` Larson, Bradley
2022-09-16 9:56 ` Krzysztof Kozlowski
2022-09-29 22:50 ` Larson, Bradley
2022-10-07 15:53 ` Krzysztof Kozlowski
2022-08-20 19:57 ` [PATCH v6 07/17] dt-bindings: reset: amd,pensando-elbasr-reset: Add AMD Pensando SR Reset Controller bindings Brad Larson
2022-08-21 20:21 ` Rob Herring
2022-08-20 19:57 ` [PATCH v6 08/17] MAINTAINERS: Add entry for AMD PENSANDO Brad Larson
2022-08-20 19:57 ` [PATCH v6 09/17] arm64: Add config for AMD Pensando SoC platforms Brad Larson
2022-08-20 19:57 ` [PATCH v6 10/17] arm64: dts: Add AMD Pensando Elba SoC support Brad Larson
2022-09-30 7:27 ` Krzysztof Kozlowski
2022-10-04 19:46 ` Larson, Bradley
2022-08-20 19:57 ` [PATCH v6 11/17] spi: cadence-quadspi: Add compatible for AMD Pensando Elba SoC Brad Larson
2022-08-20 19:57 ` Brad Larson [this message]
2022-08-21 18:18 ` [PATCH v6 12/17] spi: dw: Add support " Serge Semin
2022-08-31 18:04 ` Larson, Bradley
2022-09-11 18:20 ` Serge Semin
2022-09-14 17:03 ` Larson, Bradley
2022-08-20 19:57 ` [PATCH v6 13/17] mmc: sdhci-cadence: Enable device specific override of writel() Brad Larson
2022-08-20 19:57 ` [PATCH v6 14/17] mfd: pensando-elbasr: Add AMD Pensando Elba System Resource chip Brad Larson
2022-08-20 19:57 ` [PATCH v6 15/17] reset: elbasr: Add AMD Pensando Elba SR Reset Controller Brad Larson
2022-08-22 7:04 ` Philipp Zabel
2022-08-20 19:57 ` [PATCH v6 16/17] mmc: sdhci-cadence: Add AMD Pensando Elba SoC support Brad Larson
2022-08-20 19:57 ` [PATCH v6 17/17] mmc: sdhci-cadence: Support mmc hardware reset Brad Larson
2022-08-22 7:03 ` Philipp Zabel
2022-08-31 22:49 ` Larson, Bradley
2022-08-22 10:53 ` Ulf Hansson
2022-08-22 12:25 ` Mark Brown
2022-08-31 23:29 ` Larson, Bradley
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