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From: Bjorn Helgaas <helgaas@kernel.org>
To: Peter Zijlstra <peterz@infradead.org>
Cc: x86@kernel.org, linux-kernel@vger.kernel.org,
	bhelgaas@google.com, gregkh@linuxfoundation.org
Subject: Re: [PATCH] earlyprintk: Clean up pciserial
Date: Thu, 25 Aug 2022 12:39:59 -0500	[thread overview]
Message-ID: <20220825173959.GA2856913@bhelgaas> (raw)
In-Reply-To: <YwdeyCEtW+wa+QhH@worktop.programming.kicks-ass.net>

On Thu, Aug 25, 2022 at 01:36:40PM +0200, Peter Zijlstra wrote:
> 
> While working on a GRUB patch to support PCI-serial, a number of
> cleanups were suggested that apply to the code I took inspiration from.
> 
> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>

Acked-by: Bjorn Helgaas <bhelgaas@google.com>	# pci_ids.h

> ---
>  arch/x86/kernel/early_printk.c | 14 +++++++-------
>  include/linux/pci_ids.h        |  3 +++
>  2 files changed, 10 insertions(+), 7 deletions(-)
> 
> diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c
> index 68b38925a74f..44f937015e1e 100644
> --- a/arch/x86/kernel/early_printk.c
> +++ b/arch/x86/kernel/early_printk.c
> @@ -264,11 +264,11 @@ static __init void early_pci_serial_init(char *s)
>  	bar0 = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
>  
>  	/*
> -	 * Verify it is a UART type device
> +	 * Verify it is a 16550-UART type device
>  	 */
>  	if (((classcode >> 16 != PCI_CLASS_COMMUNICATION_MODEM) &&
>  	     (classcode >> 16 != PCI_CLASS_COMMUNICATION_SERIAL)) ||
> -	   (((classcode >> 8) & 0xff) != 0x02)) /* 16550 I/F at BAR0 */ {
> +	    (((classcode >> 8) & 0xff) != PCI_SERIAL_16550_COMPATIBLE)) {
>  		if (!force)
>  			return;
>  	}
> @@ -276,22 +276,22 @@ static __init void early_pci_serial_init(char *s)
>  	/*
>  	 * Determine if it is IO or memory mapped
>  	 */
> -	if (bar0 & 0x01) {
> +	if ((bar0 & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_IO) {
>  		/* it is IO mapped */
>  		serial_in = io_serial_in;
>  		serial_out = io_serial_out;
> -		early_serial_base = bar0&0xfffffffc;
> +		early_serial_base = bar0 & PCI_BASE_ADDRESS_IO_MASK;
>  		write_pci_config(bus, slot, func, PCI_COMMAND,
> -						cmdreg|PCI_COMMAND_IO);
> +				 cmdreg|PCI_COMMAND_IO);
>  	} else {
>  		/* It is memory mapped - assume 32-bit alignment */
>  		serial_in = mem32_serial_in;
>  		serial_out = mem32_serial_out;
>  		/* WARNING! assuming the address is always in the first 4G */
>  		early_serial_base =
> -			(unsigned long)early_ioremap(bar0 & 0xfffffff0, 0x10);
> +			(unsigned long)early_ioremap(bar0 & PCI_BASE_ADDRESS_MEM_MASK, 0x10);
>  		write_pci_config(bus, slot, func, PCI_COMMAND,
> -						cmdreg|PCI_COMMAND_MEMORY);
> +				 cmdreg|PCI_COMMAND_MEMORY);
>  	}
>  
>  	/*
> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> index 6feade66efdb..1d2c7df8cd41 100644
> --- a/include/linux/pci_ids.h
> +++ b/include/linux/pci_ids.h
> @@ -75,6 +75,9 @@
>  #define PCI_CLASS_COMMUNICATION_MODEM	0x0703
>  #define PCI_CLASS_COMMUNICATION_OTHER	0x0780
>  
> +/* I/F for SERIAL/MODEM */

I/F?  Grep says it's fairly common, but doesn't seem completely
obvious.  I guess it means "interface"?

> +#define PCI_SERIAL_16550_COMPATIBLE	0x02
> +
>  #define PCI_BASE_CLASS_SYSTEM		0x08
>  #define PCI_CLASS_SYSTEM_PIC		0x0800
>  #define PCI_CLASS_SYSTEM_PIC_IOAPIC	0x080010

  parent reply	other threads:[~2022-08-25 17:40 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-25 11:36 Peter Zijlstra
2022-08-25 11:48 ` Greg KH
2022-08-25 17:39 ` Bjorn Helgaas [this message]
2022-08-25 19:36   ` Peter Zijlstra
2022-08-25 19:51     ` Bjorn Helgaas
2022-08-25 20:08       ` Peter Zijlstra
2022-08-29 10:52 ` [tip: x86/core] x86/earlyprintk: " tip-bot2 for Peter Zijlstra

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