mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: Sean Christopherson <seanjc@google.com>
To: Sean Christopherson <seanjc@google.com>,
	Paolo Bonzini <pbonzini@redhat.com>
Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org,
	Jim Mattson <jmattson@google.com>,
	Maxim Levitsky <mlevitsk@redhat.com>,
	Oliver Upton <oupton@google.com>, Peter Shier <pshier@google.com>
Subject: [PATCH v5 02/27] KVM: VMX: Drop bits 31:16 when shoving exception error code into VMCS
Date: Tue, 30 Aug 2022 23:15:49 +0000	[thread overview]
Message-ID: <20220830231614.3580124-3-seanjc@google.com> (raw)
In-Reply-To: <20220830231614.3580124-1-seanjc@google.com>

Deliberately truncate the exception error code when shoving it into the
VMCS (VM-Entry field for vmcs01 and vmcs02, VM-Exit field for vmcs12).
Intel CPUs are incapable of handling 32-bit error codes and will never
generate an error code with bits 31:16, but userspace can provide an
arbitrary error code via KVM_SET_VCPU_EVENTS.  Failure to drop the bits
on exception injection results in failed VM-Entry, as VMX disallows
setting bits 31:16.  Setting the bits on VM-Exit would at best confuse
L1, and at worse induce a nested VM-Entry failure, e.g. if L1 decided to
reinject the exception back into L2.

Cc: stable@vger.kernel.org
Signed-off-by: Sean Christopherson <seanjc@google.com>
Reviewed-by: Jim Mattson <jmattson@google.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
---
 arch/x86/kvm/vmx/nested.c | 11 ++++++++++-
 arch/x86/kvm/vmx/vmx.c    | 12 +++++++++++-
 2 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c
index ca07d4ce4383..2ca8f1ad9c59 100644
--- a/arch/x86/kvm/vmx/nested.c
+++ b/arch/x86/kvm/vmx/nested.c
@@ -3827,7 +3827,16 @@ static void nested_vmx_inject_exception_vmexit(struct kvm_vcpu *vcpu,
 	u32 intr_info = nr | INTR_INFO_VALID_MASK;
 
 	if (vcpu->arch.exception.has_error_code) {
-		vmcs12->vm_exit_intr_error_code = vcpu->arch.exception.error_code;
+		/*
+		 * Intel CPUs do not generate error codes with bits 31:16 set,
+		 * and more importantly VMX disallows setting bits 31:16 in the
+		 * injected error code for VM-Entry.  Drop the bits to mimic
+		 * hardware and avoid inducing failure on nested VM-Entry if L1
+		 * chooses to inject the exception back to L2.  AMD CPUs _do_
+		 * generate "full" 32-bit error codes, so KVM allows userspace
+		 * to inject exception error codes with bits 31:16 set.
+		 */
+		vmcs12->vm_exit_intr_error_code = (u16)vcpu->arch.exception.error_code;
 		intr_info |= INTR_INFO_DELIVER_CODE_MASK;
 	}
 
diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index c9b49a09e6b5..7f3581960eb5 100644
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -1695,7 +1695,17 @@ static void vmx_queue_exception(struct kvm_vcpu *vcpu)
 	kvm_deliver_exception_payload(vcpu);
 
 	if (has_error_code) {
-		vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
+		/*
+		 * Despite the error code being architecturally defined as 32
+		 * bits, and the VMCS field being 32 bits, Intel CPUs and thus
+		 * VMX don't actually supporting setting bits 31:16.  Hardware
+		 * will (should) never provide a bogus error code, but AMD CPUs
+		 * do generate error codes with bits 31:16 set, and so KVM's
+		 * ABI lets userspace shove in arbitrary 32-bit values.  Drop
+		 * the upper bits to avoid VM-Fail, losing information that
+		 * does't really exist is preferable to killing the VM.
+		 */
+		vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, (u16)error_code);
 		intr_info |= INTR_INFO_DELIVER_CODE_MASK;
 	}
 
-- 
2.37.2.672.g94769d06f0-goog


  parent reply	other threads:[~2022-08-30 23:17 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-30 23:15 [PATCH v5 00/27] KVM: x86: Event/exception fixes and cleanups Sean Christopherson
2022-08-30 23:15 ` [PATCH v5 01/27] KVM: nVMX: Unconditionally purge queued/injected events on nested "exit" Sean Christopherson
2022-08-30 23:15 ` Sean Christopherson [this message]
2022-08-30 23:15 ` [PATCH v5 03/27] KVM: x86: Don't check for code breakpoints when emulating on exception Sean Christopherson
2022-08-30 23:15 ` [PATCH v5 04/27] KVM: x86: Allow clearing RFLAGS.RF on forced emulation to test code #DBs Sean Christopherson
2022-08-30 23:15 ` [PATCH v5 05/27] KVM: x86: Suppress code #DBs on Intel if MOV/POP SS blocking is active Sean Christopherson
2022-08-30 23:15 ` [PATCH v5 06/27] KVM: nVMX: Treat General Detect #DB (DR7.GD=1) as fault-like Sean Christopherson
2022-08-30 23:15 ` [PATCH v5 07/27] KVM: nVMX: Prioritize TSS T-flag #DBs over Monitor Trap Flag Sean Christopherson
2022-08-30 23:15 ` [PATCH v5 08/27] KVM: x86: Treat #DBs from the emulator as fault-like (code and DR7.GD=1) Sean Christopherson
2022-08-30 23:15 ` [PATCH v5 09/27] KVM: x86: Use DR7_GD macro instead of open coding check in emulator Sean Christopherson
2022-08-30 23:15 ` [PATCH v5 10/27] KVM: nVMX: Ignore SIPI that arrives in L2 when vCPU is not in WFS Sean Christopherson
2022-08-30 23:15 ` [PATCH v5 11/27] KVM: nVMX: Unconditionally clear mtf_pending on nested VM-Exit Sean Christopherson
2022-08-30 23:15 ` [PATCH v5 12/27] KVM: VMX: Inject #PF on ENCLS as "emulated" #PF Sean Christopherson
2022-08-30 23:16 ` [PATCH v5 13/27] KVM: x86: Rename kvm_x86_ops.queue_exception to inject_exception Sean Christopherson
2022-08-30 23:16 ` [PATCH v5 14/27] KVM: x86: Make kvm_queued_exception a properly named, visible struct Sean Christopherson
2022-08-30 23:16 ` [PATCH v5 15/27] KVM: x86: Formalize blocking of nested pending exceptions Sean Christopherson
2022-08-30 23:16 ` [PATCH v5 16/27] KVM: x86: Use kvm_queue_exception_e() to queue #DF Sean Christopherson
2022-08-30 23:16 ` [PATCH v5 17/27] KVM: x86: Hoist nested event checks above event injection logic Sean Christopherson
2022-08-30 23:16 ` [PATCH v5 18/27] KVM: x86: Evaluate ability to inject SMI/NMI/IRQ after potential VM-Exit Sean Christopherson
2022-08-30 23:16 ` [PATCH v5 19/27] KVM: nVMX: Add a helper to identify low-priority #DB traps Sean Christopherson
2022-08-30 23:16 ` [PATCH v5 20/27] KVM: nVMX: Document priority of all known events on Intel CPUs Sean Christopherson
2022-08-30 23:16 ` [PATCH v5 21/27] KVM: x86: Morph pending exceptions to pending VM-Exits at queue time Sean Christopherson
2022-08-30 23:16 ` [PATCH v5 22/27] KVM: x86: Treat pending TRIPLE_FAULT requests as pending exceptions Sean Christopherson
2022-08-30 23:16 ` [PATCH v5 23/27] KVM: VMX: Update MTF and ICEBP comments to document KVM's subtle behavior Sean Christopherson
2022-08-30 23:16 ` [PATCH v5 24/27] KVM: x86: Rename inject_pending_events() to kvm_check_and_inject_events() Sean Christopherson
2022-08-30 23:16 ` [PATCH v5 25/27] KVM: selftests: Use uapi header to get VMX and SVM exit reasons/codes Sean Christopherson
2022-08-30 23:16 ` [PATCH v5 26/27] KVM: selftests: Add an x86-only test to verify nested exception queueing Sean Christopherson
2022-08-30 23:16 ` [PATCH v5 27/27] KVM: x86: Allow force_emulation_prefix to be written without a reload Sean Christopherson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220830231614.3580124-3-seanjc@google.com \
    --to=seanjc@google.com \
    --cc=jmattson@google.com \
    --cc=kvm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mlevitsk@redhat.com \
    --cc=oupton@google.com \
    --cc=pbonzini@redhat.com \
    --cc=pshier@google.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®