From: "Jonathan Neuschäfer" <j.neuschaefer@gmx.net>
To: linux-spi@vger.kernel.org, openbmc@lists.ozlabs.org
Cc: "Lee Jones" <lee@kernel.org>, "Rob Herring" <robh+dt@kernel.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Jonathan Neuschäfer" <j.neuschaefer@gmx.net>,
"Mark Brown" <broonie@kernel.org>,
"Linus Walleij" <linus.walleij@linaro.org>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-gpio@vger.kernel.org
Subject: [PATCH 1/8] pinctrl: nuvoton: wpcm450: Refactor MFSEL setting code
Date: Sat, 5 Nov 2022 19:59:04 +0100 [thread overview]
Message-ID: <20221105185911.1547847-2-j.neuschaefer@gmx.net> (raw)
In-Reply-To: <20221105185911.1547847-1-j.neuschaefer@gmx.net>
In preparation for the next patch, which makes the logic around
setting/resetting bits in MFSEL a little more complicated, move that
code to a new function
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
---
drivers/pinctrl/nuvoton/pinctrl-wpcm450.c | 18 ++++++++++++------
1 file changed, 12 insertions(+), 6 deletions(-)
diff --git a/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c b/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c
index 211ad32cc0d8f..49b2177af17b2 100644
--- a/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c
+++ b/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c
@@ -800,6 +800,14 @@ static const struct pinctrl_pin_desc wpcm450_pins[] = {
WPCM450_PIN(124), WPCM450_PIN(125), WPCM450_PIN(126), WPCM450_PIN(127),
};
+/* Helper function to update MFSEL field according to the selected function */
+static void wpcm450_update_mfsel(struct regmap *gcr_regmap, int reg, int bit, int fn, int fn_selected)
+{
+ bool value = (fn == fn_selected);
+
+ regmap_update_bits(gcr_regmap, reg, BIT(bit), value ? BIT(bit) : 0);
+}
+
/* Enable mode in pin group */
static void wpcm450_setfunc(struct regmap *gcr_regmap, const unsigned int *pin,
int npins, int func)
@@ -811,13 +819,11 @@ static void wpcm450_setfunc(struct regmap *gcr_regmap, const unsigned int *pin,
cfg = &pincfg[pin[i]];
if (func == fn_gpio || cfg->fn0 == func || cfg->fn1 == func) {
if (cfg->reg0)
- regmap_update_bits(gcr_regmap, cfg->reg0,
- BIT(cfg->bit0),
- (cfg->fn0 == func) ? BIT(cfg->bit0) : 0);
+ wpcm450_update_mfsel(gcr_regmap, cfg->reg0,
+ cfg->bit0, cfg->fn0, func);
if (cfg->reg1)
- regmap_update_bits(gcr_regmap, cfg->reg1,
- BIT(cfg->bit1),
- (cfg->fn1 == func) ? BIT(cfg->bit1) : 0);
+ wpcm450_update_mfsel(gcr_regmap, cfg->reg1,
+ cfg->bit1, cfg->fn1, func);
}
}
}
--
2.35.1
next prev parent reply other threads:[~2022-11-05 18:59 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-05 18:59 [PATCH 0/8] Nuvoton WPCM450 FIU SPI flash controller Jonathan Neuschäfer
2022-11-05 18:59 ` Jonathan Neuschäfer [this message]
2022-11-05 18:59 ` [PATCH 2/8] pinctrl: nuvoton: wpcm450: Fix handling of inverted MFSEL bits Jonathan Neuschäfer
2022-11-05 18:59 ` [PATCH 3/8] dt-bindings: spi: Add Nuvoton WPCM450 Flash Interface Unit (FIU) Jonathan Neuschäfer
2022-11-06 9:38 ` Krzysztof Kozlowski
2022-11-06 14:45 ` Jonathan Neuschäfer
2022-11-07 8:09 ` Krzysztof Kozlowski
2022-11-07 12:12 ` Jonathan Neuschäfer
2022-11-06 13:27 ` Rob Herring
2022-11-05 18:59 ` [PATCH 4/8] dt-bindings: mfd: syscon: Add nuvoton,wpcm450-shm Jonathan Neuschäfer
2022-11-06 9:39 ` Krzysztof Kozlowski
2022-11-07 9:20 ` Lee Jones
2022-11-05 18:59 ` [PATCH 5/8] ARM: dts: wpcm450: Add FIU SPI controller node Jonathan Neuschäfer
2022-11-05 18:59 ` [PATCH 6/8] ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add SPI flash Jonathan Neuschäfer
2022-11-05 18:59 ` [PATCH 7/8] spi: wpcm-fiu: Add driver for Nuvoton WPCM450 Flash Interface Unit (FIU) Jonathan Neuschäfer
2022-11-05 21:35 ` kernel test robot
2022-11-06 14:51 ` Jonathan Neuschäfer
2022-11-05 21:45 ` kernel test robot
2022-11-05 18:59 ` [PATCH 8/8] spi: wpcm-fiu: Add direct map support Jonathan Neuschäfer
2022-11-05 21:35 ` kernel test robot
2022-11-06 14:49 ` Jonathan Neuschäfer
2022-11-09 8:41 ` [PATCH 0/8] Nuvoton WPCM450 FIU SPI flash controller Linus Walleij
2022-11-09 10:08 ` Jonathan Neuschäfer
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