* [PATCH] usb: dwc3: improve the config dependency of USB_DWC3_XILINX
@ 2022-11-16 11:04 Lukas Bulwahn
2022-11-18 0:27 ` Thinh Nguyen
0 siblings, 1 reply; 2+ messages in thread
From: Lukas Bulwahn @ 2022-11-16 11:04 UTC (permalink / raw)
To: Thinh Nguyen, Greg Kroah-Hartman, Felipe Balbi, linux-usb
Cc: kernel-janitors, linux-kernel, Lukas Bulwahn
A request to Manish Narani (see Link) asked for clarification of the
reference to the config ARCH_VERSAL in the support of Xilinx SoCs with
DesignWare Core USB3 IP.
As there is no response, clean up the reference to the non-existing config
symbol. While at it, follow up on Felipe Balbi's request to add the
alternative COMPILE_TEST dependency.
Link: https://lore.kernel.org/all/CAKXUXMwgWfX8+OvY0aCwRNukencwJERAZzU7p4eOLXQ2zv6rAg@mail.gmail.com/
Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
---
drivers/usb/dwc3/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index 03ededa86da1..b2f72b0e75c6 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -152,11 +152,11 @@ config USB_DWC3_IMX8MP
config USB_DWC3_XILINX
tristate "Xilinx Platforms"
- depends on (ARCH_ZYNQMP || ARCH_VERSAL) && OF
+ depends on (ARCH_ZYNQMP || COMPILE_TEST) && OF
default USB_DWC3
help
Support Xilinx SoCs with DesignWare Core USB3 IP.
- This driver handles both ZynqMP and Versal SoC operations.
+ This driver handles ZynqMP SoC operations.
Say 'Y' or 'M' if you have one such device.
config USB_DWC3_AM62
--
2.17.1
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH] usb: dwc3: improve the config dependency of USB_DWC3_XILINX
2022-11-16 11:04 [PATCH] usb: dwc3: improve the config dependency of USB_DWC3_XILINX Lukas Bulwahn
@ 2022-11-18 0:27 ` Thinh Nguyen
0 siblings, 0 replies; 2+ messages in thread
From: Thinh Nguyen @ 2022-11-18 0:27 UTC (permalink / raw)
To: Lukas Bulwahn, Manish Narani
Cc: Thinh Nguyen, Greg Kroah-Hartman, Felipe Balbi, linux-usb,
kernel-janitors, linux-kernel
+Manish
On Wed, Nov 16, 2022, Lukas Bulwahn wrote:
> A request to Manish Narani (see Link) asked for clarification of the
> reference to the config ARCH_VERSAL in the support of Xilinx SoCs with
> DesignWare Core USB3 IP.
>
> As there is no response, clean up the reference to the non-existing config
> symbol. While at it, follow up on Felipe Balbi's request to add the
> alternative COMPILE_TEST dependency.
>
> Link: https://urldefense.com/v3/__https://lore.kernel.org/all/CAKXUXMwgWfX8*OvY0aCwRNukencwJERAZzU7p4eOLXQ2zv6rAg@mail.gmail.com/__;Kw!!A4F2R9G_pg!aKs4dY02i_8ddqApoGvxFloscTBQxWlkhYT8XAyNkJjQWhTQGaD2-41qgo4BeUZVdK1Wc4lqSC-hp0mEiB1wyqcE3_U7$
>
> Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com>
> ---
> drivers/usb/dwc3/Kconfig | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
> index 03ededa86da1..b2f72b0e75c6 100644
> --- a/drivers/usb/dwc3/Kconfig
> +++ b/drivers/usb/dwc3/Kconfig
> @@ -152,11 +152,11 @@ config USB_DWC3_IMX8MP
>
> config USB_DWC3_XILINX
> tristate "Xilinx Platforms"
> - depends on (ARCH_ZYNQMP || ARCH_VERSAL) && OF
> + depends on (ARCH_ZYNQMP || COMPILE_TEST) && OF
> default USB_DWC3
> help
> Support Xilinx SoCs with DesignWare Core USB3 IP.
> - This driver handles both ZynqMP and Versal SoC operations.
> + This driver handles ZynqMP SoC operations.
> Say 'Y' or 'M' if you have one such device.
>
> config USB_DWC3_AM62
> --
> 2.17.1
>
Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com>
BR,
Thinh
^ permalink raw reply [flat|nested] 2+ messages in thread
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