* [PATCH v4] drm/amd/display: fix PSR-SU/DSC interoperability support
@ 2023-01-05 22:23 Hamza Mahfooz
2023-01-06 15:06 ` Harry Wentland
0 siblings, 1 reply; 2+ messages in thread
From: Hamza Mahfooz @ 2023-01-05 22:23 UTC (permalink / raw)
To: amd-gfx
Cc: Hamza Mahfooz, Harry Wentland, Leo Li, Rodrigo Siqueira,
Alex Deucher, Christian König, Pan, Xinhui, David Airlie,
Daniel Vetter, Anthony Koo, David Zhang, Alex Hung, Shirish S,
Po Ting Chen, Nicholas Kazlauskas, Brian Chang, Robin Chen,
Tom Chung, Camille Cho, dri-devel, linux-kernel
Currently, there are issues with enabling PSR-SU + DSC. This stems from
the fact that DSC imposes a slice height on transmitted video data and
we are not conforming to that slice height in PSR-SU regions. So, pass
slice_height into su_y_granularity to feed the DSC slice height into
PSR-SU code.
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
---
v2: move code to modules/power.
v3: use ASSERT() instead of WARN() and add a condition that clarifies
that PSR-SU + DSC can only be enabled on an eDP connection.
v4: change the logic again to allow non-eDP links to pass the first
filter in psr_su_set_y_granularity() (this allows us to maintain
the v1/v2 behaviour, while still being clear as to the fact that we
only care about eDP connections).
---
.../drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c | 3 ++
.../amd/display/modules/power/power_helpers.c | 31 +++++++++++++++++++
.../amd/display/modules/power/power_helpers.h | 3 ++
3 files changed, 37 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
index 26291db0a3cf..872d06fe1436 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
@@ -122,6 +122,9 @@ bool amdgpu_dm_link_setup_psr(struct dc_stream_state *stream)
psr_config.allow_multi_disp_optimizations =
(amdgpu_dc_feature_mask & DC_PSR_ALLOW_MULTI_DISP_OPT);
+ if (!psr_su_set_y_granularity(dc, link, stream, &psr_config))
+ return false;
+
ret = dc_link_setup_psr(link, stream, &psr_config, &psr_context);
}
diff --git a/drivers/gpu/drm/amd/display/modules/power/power_helpers.c b/drivers/gpu/drm/amd/display/modules/power/power_helpers.c
index 9b5d9b2c9a6a..cf4fa87c7db6 100644
--- a/drivers/gpu/drm/amd/display/modules/power/power_helpers.c
+++ b/drivers/gpu/drm/amd/display/modules/power/power_helpers.c
@@ -916,3 +916,34 @@ bool mod_power_only_edp(const struct dc_state *context, const struct dc_stream_s
{
return context && context->stream_count == 1 && dc_is_embedded_signal(stream->signal);
}
+
+bool psr_su_set_y_granularity(struct dc *dc, struct dc_link *link,
+ struct dc_stream_state *stream,
+ struct psr_config *config)
+{
+ uint16_t pic_height;
+ uint8_t slice_height;
+
+ if ((link->connector_signal & SIGNAL_TYPE_EDP) &&
+ (!dc->caps.edp_dsc_support ||
+ link->panel_config.dsc.disable_dsc_edp ||
+ !link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT ||
+ !stream->timing.dsc_cfg.num_slices_v))
+ return true;
+
+ pic_height = stream->timing.v_addressable +
+ stream->timing.v_border_top + stream->timing.v_border_bottom;
+ slice_height = pic_height / stream->timing.dsc_cfg.num_slices_v;
+
+ if (slice_height) {
+ if (config->su_y_granularity &&
+ (slice_height % config->su_y_granularity)) {
+ ASSERT(0);
+ return false;
+ }
+
+ config->su_y_granularity = slice_height;
+ }
+
+ return true;
+}
diff --git a/drivers/gpu/drm/amd/display/modules/power/power_helpers.h b/drivers/gpu/drm/amd/display/modules/power/power_helpers.h
index 316452e9dbc9..bb16b37b83da 100644
--- a/drivers/gpu/drm/amd/display/modules/power/power_helpers.h
+++ b/drivers/gpu/drm/amd/display/modules/power/power_helpers.h
@@ -59,4 +59,7 @@ void mod_power_calc_psr_configs(struct psr_config *psr_config,
const struct dc_stream_state *stream);
bool mod_power_only_edp(const struct dc_state *context,
const struct dc_stream_state *stream);
+bool psr_su_set_y_granularity(struct dc *dc, struct dc_link *link,
+ struct dc_stream_state *stream,
+ struct psr_config *config);
#endif /* MODULES_POWER_POWER_HELPERS_H_ */
--
2.38.1
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH v4] drm/amd/display: fix PSR-SU/DSC interoperability support
2023-01-05 22:23 [PATCH v4] drm/amd/display: fix PSR-SU/DSC interoperability support Hamza Mahfooz
@ 2023-01-06 15:06 ` Harry Wentland
0 siblings, 0 replies; 2+ messages in thread
From: Harry Wentland @ 2023-01-06 15:06 UTC (permalink / raw)
To: Hamza Mahfooz, amd-gfx
Cc: Leo Li, Rodrigo Siqueira, Alex Deucher, Christian König,
Pan, Xinhui, David Airlie, Daniel Vetter, Anthony Koo,
David Zhang, Alex Hung, Shirish S, Po Ting Chen,
Nicholas Kazlauskas, Brian Chang, Robin Chen, Tom Chung,
Camille Cho, dri-devel, linux-kernel
On 1/5/23 17:23, Hamza Mahfooz wrote:
> Currently, there are issues with enabling PSR-SU + DSC. This stems from
> the fact that DSC imposes a slice height on transmitted video data and
> we are not conforming to that slice height in PSR-SU regions. So, pass
> slice_height into su_y_granularity to feed the DSC slice height into
> PSR-SU code.
>
> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Would be good if you can get Leo's review.
Harry
> ---
> v2: move code to modules/power.
> v3: use ASSERT() instead of WARN() and add a condition that clarifies
> that PSR-SU + DSC can only be enabled on an eDP connection.
> v4: change the logic again to allow non-eDP links to pass the first
> filter in psr_su_set_y_granularity() (this allows us to maintain
> the v1/v2 behaviour, while still being clear as to the fact that we
> only care about eDP connections).
> ---
> .../drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c | 3 ++
> .../amd/display/modules/power/power_helpers.c | 31 +++++++++++++++++++
> .../amd/display/modules/power/power_helpers.h | 3 ++
> 3 files changed, 37 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
> index 26291db0a3cf..872d06fe1436 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_psr.c
> @@ -122,6 +122,9 @@ bool amdgpu_dm_link_setup_psr(struct dc_stream_state *stream)
> psr_config.allow_multi_disp_optimizations =
> (amdgpu_dc_feature_mask & DC_PSR_ALLOW_MULTI_DISP_OPT);
>
> + if (!psr_su_set_y_granularity(dc, link, stream, &psr_config))
> + return false;
> +
> ret = dc_link_setup_psr(link, stream, &psr_config, &psr_context);
>
> }
> diff --git a/drivers/gpu/drm/amd/display/modules/power/power_helpers.c b/drivers/gpu/drm/amd/display/modules/power/power_helpers.c
> index 9b5d9b2c9a6a..cf4fa87c7db6 100644
> --- a/drivers/gpu/drm/amd/display/modules/power/power_helpers.c
> +++ b/drivers/gpu/drm/amd/display/modules/power/power_helpers.c
> @@ -916,3 +916,34 @@ bool mod_power_only_edp(const struct dc_state *context, const struct dc_stream_s
> {
> return context && context->stream_count == 1 && dc_is_embedded_signal(stream->signal);
> }
> +
> +bool psr_su_set_y_granularity(struct dc *dc, struct dc_link *link,
> + struct dc_stream_state *stream,
> + struct psr_config *config)
> +{
> + uint16_t pic_height;
> + uint8_t slice_height;
> +
> + if ((link->connector_signal & SIGNAL_TYPE_EDP) &&
> + (!dc->caps.edp_dsc_support ||
> + link->panel_config.dsc.disable_dsc_edp ||
> + !link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT ||
> + !stream->timing.dsc_cfg.num_slices_v))
> + return true;
> +
> + pic_height = stream->timing.v_addressable +
> + stream->timing.v_border_top + stream->timing.v_border_bottom;
> + slice_height = pic_height / stream->timing.dsc_cfg.num_slices_v;
> +
> + if (slice_height) {
> + if (config->su_y_granularity &&
> + (slice_height % config->su_y_granularity)) {
> + ASSERT(0);
> + return false;
> + }
> +
> + config->su_y_granularity = slice_height;
> + }
> +
> + return true;
> +}
> diff --git a/drivers/gpu/drm/amd/display/modules/power/power_helpers.h b/drivers/gpu/drm/amd/display/modules/power/power_helpers.h
> index 316452e9dbc9..bb16b37b83da 100644
> --- a/drivers/gpu/drm/amd/display/modules/power/power_helpers.h
> +++ b/drivers/gpu/drm/amd/display/modules/power/power_helpers.h
> @@ -59,4 +59,7 @@ void mod_power_calc_psr_configs(struct psr_config *psr_config,
> const struct dc_stream_state *stream);
> bool mod_power_only_edp(const struct dc_state *context,
> const struct dc_stream_state *stream);
> +bool psr_su_set_y_granularity(struct dc *dc, struct dc_link *link,
> + struct dc_stream_state *stream,
> + struct psr_config *config);
> #endif /* MODULES_POWER_POWER_HELPERS_H_ */
^ permalink raw reply [flat|nested] 2+ messages in thread
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