[PATCH 1/2] scsi: ufs: core: Add host quirk UFSHCD_QUIRK_MCQ_BROKEN_INTR

[PATCH 1/2] scsi: ufs: core: Add host quirk UFSHCD_QUIRK_MCQ_BROKEN_INTR

[Po-Wen Kao]

Quirk UFSHCD_QUIRK_MCQ_BROKEN_INTR is introduced for plaforms that
implement different interrupt topology from UFSHCI 4.0 spec.
Some platform raise per hw queue interrupt in addition to
CQES (traditional) when ESI is disabled.

Enable this quirk will disable CQES and use only per hw queue
interrupt.

Signed-off-by: Po-Wen Kao <powen.kao@mediatek.com>
---
 drivers/ufs/core/ufshcd.c | 8 ++++++--
 include/ufs/ufshcd.h      | 7 +++++++
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
index acae4e194ec4..1e1271aca1f2 100644
--- a/drivers/ufs/core/ufshcd.c
+++ b/drivers/ufs/core/ufshcd.c
@@ -8493,11 +8493,15 @@ static int ufshcd_alloc_mcq(struct ufs_hba *hba)
 static void ufshcd_config_mcq(struct ufs_hba *hba)
 {
 	int ret;
-
+	u32 intrs;
 	ret = ufshcd_mcq_vops_config_esi(hba);
+
 	dev_info(hba->dev, "ESI %sconfigured\n", ret ? "is not " : "");
 
-	ufshcd_enable_intr(hba, UFSHCD_ENABLE_MCQ_INTRS);
+	intrs = (hba->quirks & UFSHCD_QUIRK_MCQ_BROKEN_INTR) ?
+		(UFSHCD_ENABLE_MCQ_INTRS & ~MCQ_CQ_EVENT_STATUS) : UFSHCD_ENABLE_MCQ_INTRS;
+
+	ufshcd_enable_intr(hba, intrs);
 	ufshcd_mcq_make_queues_operational(hba);
 	ufshcd_mcq_config_mac(hba, hba->nutrs);
 
diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
index 25aab8ec4f86..7bb9e1a17154 100644
--- a/include/ufs/ufshcd.h
+++ b/include/ufs/ufshcd.h
@@ -616,6 +616,13 @@ enum ufshcd_quirks {
 	 * to reinit the device after switching to maximum gear.
 	 */
 	UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH       = 1 << 19,
+
+	/*
+	 * Some platform raises interrupt (per queue) in addition to
+	 * CQES (traditional) when ESI is disabled.
+	 * Enable this quirk will disable CQES and use per queue interrupt.
+	 */
+	UFSHCD_QUIRK_MCQ_BROKEN_INTR			= 1 << 20,
 };
 
 enum ufshcd_caps {
-- 
2.18.0

[PATCH 2/2] scsi: ufs: ufs-mediatek: Add UFSHCD_QUIRK_MCQ_BROKEN_INTR quirk

[Po-Wen Kao]

Set UFSHCD_QUIRK_MCQ_BROKEN_INTR for mtk driver

Signed-off-by: Po-Wen Kao <powen.kao@mediatek.com>
---
 drivers/ufs/host/ufs-mediatek.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
index 73e217260390..b4a4a580ad37 100644
--- a/drivers/ufs/host/ufs-mediatek.c
+++ b/drivers/ufs/host/ufs-mediatek.c
@@ -901,6 +901,8 @@ static int ufs_mtk_init(struct ufs_hba *hba)
 	hba->caps |= UFSHCD_CAP_CLK_SCALING;
 
 	hba->quirks |= UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL;
+	hba->quirks |= UFSHCD_QUIRK_MCQ_BROKEN_INTR;
+
 	hba->vps->wb_flush_threshold = UFS_WB_BUF_REMAIN_PERCENT(80);
 
 	if (host->caps & UFS_MTK_CAP_DISABLE_AH8)
-- 
2.18.0

Re: [PATCH 2/2] scsi: ufs: ufs-mediatek: Add UFSHCD_QUIRK_MCQ_BROKEN_INTR quirk

[Stanley Chu]

On Tue, Mar 28, 2023 at 6:42 PM Po-Wen Kao <powen.kao@mediatek.com> wrote:
>
> Set UFSHCD_QUIRK_MCQ_BROKEN_INTR for mtk driver
>
> Signed-off-by: Po-Wen Kao <powen.kao@mediatek.com>
> ---
>  drivers/ufs/host/ufs-mediatek.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/drivers/ufs/host/ufs-mediatek.c b/drivers/ufs/host/ufs-mediatek.c
> index 73e217260390..b4a4a580ad37 100644
> --- a/drivers/ufs/host/ufs-mediatek.c
> +++ b/drivers/ufs/host/ufs-mediatek.c
> @@ -901,6 +901,8 @@ static int ufs_mtk_init(struct ufs_hba *hba)
>         hba->caps |= UFSHCD_CAP_CLK_SCALING;
>
>         hba->quirks |= UFSHCI_QUIRK_SKIP_MANUAL_WB_FLUSH_CTRL;
> +       hba->quirks |= UFSHCD_QUIRK_MCQ_BROKEN_INTR;
> +
>         hba->vps->wb_flush_threshold = UFS_WB_BUF_REMAIN_PERCENT(80);
>
>         if (host->caps & UFS_MTK_CAP_DISABLE_AH8)
> --
> 2.18.0
>

Reviewed-by: Stanley Chu <stanley.chu@mediatek.com>

Re: [PATCH 2/2] scsi: ufs: ufs-mediatek: Add UFSHCD_QUIRK_MCQ_BROKEN_INTR quirk

[Bart Van Assche]

On 3/28/23 03:37, Po-Wen Kao wrote:
> Set UFSHCD_QUIRK_MCQ_BROKEN_INTR for mtk driver

Reviewed-by: Bart Van Assche <bvanassche@acm.org>

Re: [PATCH 1/2] scsi: ufs: core: Add host quirk UFSHCD_QUIRK_MCQ_BROKEN_INTR

[Stanley Chu]

Hi Po-Wen,

On Tue, Mar 28, 2023 at 6:42 PM Po-Wen Kao <powen.kao@mediatek.com> wrote:
>
> Quirk UFSHCD_QUIRK_MCQ_BROKEN_INTR is introduced for plaforms that
> implement different interrupt topology from UFSHCI 4.0 spec.
> Some platform raise per hw queue interrupt in addition to
> CQES (traditional) when ESI is disabled.
>
> Enable this quirk will disable CQES and use only per hw queue
> interrupt.
>
> Signed-off-by: Po-Wen Kao <powen.kao@mediatek.com>
> ---
>  drivers/ufs/core/ufshcd.c | 8 ++++++--
>  include/ufs/ufshcd.h      | 7 +++++++
>  2 files changed, 13 insertions(+), 2 deletions(-)

Reviewed-by: Stanley Chu <stanley.chu@mediatek.com>

Re: [PATCH 1/2] scsi: ufs: core: Add host quirk UFSHCD_QUIRK_MCQ_BROKEN_INTR

[Bart Van Assche]

On 3/28/23 03:37, Po-Wen Kao wrote:
> diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
> index acae4e194ec4..1e1271aca1f2 100644
> --- a/drivers/ufs/core/ufshcd.c
> +++ b/drivers/ufs/core/ufshcd.c
> @@ -8493,11 +8493,15 @@ static int ufshcd_alloc_mcq(struct ufs_hba *hba)
>   static void ufshcd_config_mcq(struct ufs_hba *hba)
>   {
>   	int ret;
> -
> +	u32 intrs;
>   	ret = ufshcd_mcq_vops_config_esi(hba);
> +
>   	dev_info(hba->dev, "ESI %sconfigured\n", ret ? "is not " : "");

The use of blank lines in the above code is weird. Please make sure 
there is no blank line inside the declaration block and also that there 
is a blank line between declarations and statements as required by the 
kernel coding style.

> -	ufshcd_enable_intr(hba, UFSHCD_ENABLE_MCQ_INTRS);
> +	intrs = (hba->quirks & UFSHCD_QUIRK_MCQ_BROKEN_INTR) ?
> +		(UFSHCD_ENABLE_MCQ_INTRS & ~MCQ_CQ_EVENT_STATUS) : UFSHCD_ENABLE_MCQ_INTRS;

All parentheses in the above expression are superfluous. Please leave 
these out. Or even better, rewrite the above code as follows:

	intrs = UFSHCD_ENABLE_MCQ_INTRS;
	if (hba->quirks & UFSHCD_QUIRK_MCQ_BROKEN_INTR)
		intrs &= ~MCQ_CQ_EVENT_STATUS;

> +
> +	/*
> +	 * Some platform raises interrupt (per queue) in addition to
> +	 * CQES (traditional) when ESI is disabled.
> +	 * Enable this quirk will disable CQES and use per queue interrupt.
> +	 */
> +	UFSHCD_QUIRK_MCQ_BROKEN_INTR			= 1 << 20,

Isn't this an UFS controller behavior instead of a platform behavior? 
Please consider changing "platform raises" into "controllers raise".

Thanks,

Bart.