From: Tony Luck <tony.luck@intel.com>
To: x86@kernel.org
Cc: linux-kernel@vger.kernel.org, patches@lists.linux.dev,
Tony Luck <tony.luck@intel.com>
Subject: [PATCH] x86/cpu: Add Xeon Emerald Rapids to list of CPUs that support PPIN
Date: Tue, 4 Apr 2023 14:21:24 -0700 [thread overview]
Message-ID: <20230404212124.428118-1-tony.luck@intel.com> (raw)
This should be the last addition to this table. Future CPUs will
enumerate PPIN support using CPUID.
Signed-off-by: Tony Luck <tony.luck@intel.com>
---
arch/x86/kernel/cpu/common.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 8cd4126d8253..80710a68ef7d 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -121,6 +121,7 @@ static const struct x86_cpu_id ppin_cpuids[] = {
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &ppin_info[X86_VENDOR_INTEL]),
X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &ppin_info[X86_VENDOR_INTEL]),
X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &ppin_info[X86_VENDOR_INTEL]),
+ X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &ppin_info[X86_VENDOR_INTEL]),
X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &ppin_info[X86_VENDOR_INTEL]),
X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &ppin_info[X86_VENDOR_INTEL]),
--
2.39.2
next reply other threads:[~2023-04-04 21:21 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-04 21:21 Tony Luck [this message]
2023-04-05 18:19 ` [tip: x86/cpu] " tip-bot2 for Tony Luck
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