mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
* [PATCH] x86/cpu: Add Xeon Emerald Rapids to list of CPUs that support PPIN
@ 2023-04-04 21:21 Tony Luck
  2023-04-05 18:19 ` [tip: x86/cpu] " tip-bot2 for Tony Luck
  0 siblings, 1 reply; 2+ messages in thread
From: Tony Luck @ 2023-04-04 21:21 UTC (permalink / raw)
  To: x86; +Cc: linux-kernel, patches, Tony Luck

This should be the last addition to this table. Future CPUs will
enumerate PPIN support using CPUID.

Signed-off-by: Tony Luck <tony.luck@intel.com>
---
 arch/x86/kernel/cpu/common.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 8cd4126d8253..80710a68ef7d 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -121,6 +121,7 @@ static const struct x86_cpu_id ppin_cpuids[] = {
 	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &ppin_info[X86_VENDOR_INTEL]),
 	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &ppin_info[X86_VENDOR_INTEL]),
 	X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &ppin_info[X86_VENDOR_INTEL]),
+	X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &ppin_info[X86_VENDOR_INTEL]),
 	X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &ppin_info[X86_VENDOR_INTEL]),
 	X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &ppin_info[X86_VENDOR_INTEL]),
 
-- 
2.39.2


^ permalink raw reply	[flat|nested] 2+ messages in thread

* [tip: x86/cpu] x86/cpu: Add Xeon Emerald Rapids to list of CPUs that support PPIN
  2023-04-04 21:21 [PATCH] x86/cpu: Add Xeon Emerald Rapids to list of CPUs that support PPIN Tony Luck
@ 2023-04-05 18:19 ` tip-bot2 for Tony Luck
  0 siblings, 0 replies; 2+ messages in thread
From: tip-bot2 for Tony Luck @ 2023-04-05 18:19 UTC (permalink / raw)
  To: linux-tip-commits; +Cc: Tony Luck, Borislav Petkov (AMD), x86, linux-kernel

The following commit has been merged into the x86/cpu branch of tip:

Commit-ID:     36168bc061b4368ad19e82b06a6463c95d3bb9a7
Gitweb:        https://git.kernel.org/tip/36168bc061b4368ad19e82b06a6463c95d3bb9a7
Author:        Tony Luck <tony.luck@intel.com>
AuthorDate:    Tue, 04 Apr 2023 14:21:24 -07:00
Committer:     Borislav Petkov (AMD) <bp@alien8.de>
CommitterDate: Wed, 05 Apr 2023 20:01:52 +02:00

x86/cpu: Add Xeon Emerald Rapids to list of CPUs that support PPIN

This should be the last addition to this table. Future CPUs will
enumerate PPIN support using CPUID.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20230404212124.428118-1-tony.luck@intel.com
---
 arch/x86/kernel/cpu/common.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 8cd4126..80710a6 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -121,6 +121,7 @@ static const struct x86_cpu_id ppin_cpuids[] = {
 	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_X, &ppin_info[X86_VENDOR_INTEL]),
 	X86_MATCH_INTEL_FAM6_MODEL(ICELAKE_D, &ppin_info[X86_VENDOR_INTEL]),
 	X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, &ppin_info[X86_VENDOR_INTEL]),
+	X86_MATCH_INTEL_FAM6_MODEL(EMERALDRAPIDS_X, &ppin_info[X86_VENDOR_INTEL]),
 	X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &ppin_info[X86_VENDOR_INTEL]),
 	X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &ppin_info[X86_VENDOR_INTEL]),
 

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2023-04-05 18:19 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-04-04 21:21 [PATCH] x86/cpu: Add Xeon Emerald Rapids to list of CPUs that support PPIN Tony Luck
2023-04-05 18:19 ` [tip: x86/cpu] " tip-bot2 for Tony Luck

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®