From: David Epping <david.epping@missinglinkelectronics.com>
To: "Russell King (Oracle)" <linux@armlinux.org.uk>
Cc: Andrew Lunn <andrew@lunn.ch>,
Heiner Kallweit <hkallweit1@gmail.com>,
"David S . Miller" <davem@davemloft.net>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
UNGLinuxDriver@microchip.com
Subject: Re: [PATCH net 3/3] net: phy: mscc: enable VSC8501/2 RGMII RX clock
Date: Mon, 22 May 2023 15:48:23 +0200 [thread overview]
Message-ID: <20230522134823.GA18381@nucnuc.mle> (raw)
In-Reply-To: <ZGpcGbq47nL/rlEb@shell.armlinux.org.uk>
On Sun, May 21, 2023 at 06:59:53PM +0100, Russell King (Oracle) wrote:
> On Sat, May 20, 2023 at 06:06:03PM +0200, David Epping wrote:
> > +static int vsc85xx_rgmii_enable_rx_clk(struct phy_device *phydev,
> > + u32 rgmii_cntl)
> > +{
> > + int rc, phy_id;
> > +
> > + phy_id = phydev->drv->phy_id & phydev->drv->phy_id_mask;
> > + if (PHY_ID_VSC8501 != phy_id && PHY_ID_VSC8502 != phy_id)
> > + return 0;
>
> As you are accessing the phy_id in the phy_driver struct, isn't it
> already true that this will be initialised to constants such as
> PHY_ID_VSC8501 or PHY_ID_VSC8502? In which case, why would you need
> to mask it with drv->phy_id_mask ?
Yes you are right. I copied the code from the vsc85xx_config_init()
function in the same driver, but the extra masking is not necessary.
It seems to be the phy_id in the struct phy_device which is read from
the MDIO bus and thus needs masking. phy_id in struct phy_driver seems
compile time defined and already masked.
I'll adjust my patch.
> > +
> > + mutex_lock(&phydev->lock);
> > +
> > + rc = phy_modify_paged(phydev, MSCC_PHY_PAGE_EXTENDED_2, rgmii_cntl,
> > + VSC8502_RGMII_RX_CLK_DISABLE, 0);
> > +
> > + mutex_unlock(&phydev->lock);
>
> What is the purpose of taking this lock? phy_modify_paged() will do its
> read-modify-write access and page accesses under the MDIO bus lock,
> which should be all that's required to guarantee an atomic update.
Yes, I copied this from the vsc85xx_rgmii_set_skews() function in the
same driver accessing the same register in the same context.
But maybe it is used there because of repeated phydev->interface
accesses, which may otherwise change during function execution?
I'll remove the locks from my patch.
Thanks for your feedback.
next prev parent reply other threads:[~2023-05-22 13:48 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-20 16:06 [PATCH net 0/3] net: phy: mscc: support VSC8501 David Epping
2023-05-20 16:06 ` [PATCH net 1/3] net: phy: mscc: add VSC8502 to MODULE_DEVICE_TABLE David Epping
2023-05-21 12:28 ` Vladimir Oltean
2023-05-20 16:06 ` [PATCH net 2/3] net: phy: mscc: add support for VSC8501 David Epping
2023-05-21 12:28 ` Vladimir Oltean
2023-05-20 16:06 ` [PATCH net 3/3] net: phy: mscc: enable VSC8501/2 RGMII RX clock David Epping
2023-05-21 12:35 ` Vladimir Oltean
2023-05-21 13:12 ` Vladimir Oltean
2023-05-21 16:08 ` David Epping
2023-05-21 13:43 ` Vladimir Oltean
2023-05-21 16:16 ` David Epping
2023-05-22 9:49 ` Vladimir Oltean
2023-05-22 9:54 ` Vladimir Oltean
2023-05-22 9:58 ` Vladimir Oltean
2023-05-22 14:00 ` David Epping
2023-05-22 14:42 ` Andrew Lunn
2023-05-22 15:11 ` Vladimir Oltean
2023-05-22 15:22 ` David Epping
2023-05-22 15:42 ` Vladimir Oltean
2023-05-21 17:59 ` Russell King (Oracle)
2023-05-22 13:48 ` David Epping [this message]
2023-05-21 13:33 ` [PATCH net 0/3] net: phy: mscc: support VSC8501 Vladimir Oltean
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