[PATCH V2 00/14] arm64: dts: ti: Fix up references to phandles

[PATCH V2 00/14] arm64: dts: ti: Fix up references to phandles

[Nishanth Menon]

When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.

This set was caught by using: git grep '\s&' arch/arm64/boot/dts/ti/
and manually going through the list.

Changes since V1:
* Few formatting changes included to keep consistent
* Picked a Reviewed-by
* ai64 gets a few fixes as part of the cleanup (patches #3, #4)
* Picked up Reviewed-by from Jan.

V1: https://lore.kernel.org/all/20230601152636.858553-1-nm@ti.com/

Nishanth Menon (14):
  arm64: dts: ti: k3-j721e-sk: Fixup reference to phandles array
  arm64: dts: ti: k3-j721e-som-p0/common-proc-board: Fixup reference to
    phandles array
  arm64: dts: ti: k3-j721e-beagleboneai64: Move camera gpio pinctrl to
    gpio node
  arm64: dts: ti: k3-j721e-beagleboneai64: Move eeprom WP gpio pinctrl
    to eeprom node
  arm64: dts: ti: k3-j721e-beagleboneai64: Fixup reference to phandles
    array
  arm64: dts: ti: k3-am642-phyboard-electra-rdk: Fixup reference to
    phandles array
  arm64: dts: ti: k3-j7200-som/common-proc-board: Fixup reference to
    phandles array
  arm64: dts: ti: k3-j721s2-common-proc-board: Fixup reference to
    phandles array
  arm64: dts: ti: k3-am625-sk: Fixup reference to phandles array
  arm64: dts: ti: k3-am64-evm: Fixup reference to phandles array
  arm64: dts: ti: k3-am64-sk: Fixup reference to phandles array
  arm64: dts: ti: k3-am65-iot*: Fixup reference to phandles array
  arm64: dts: ti: k3-am654-base-board: Fixup reference to phandles array
  arm64: dts: ti: k3-am68-sk-base-board: Fixup reference to phandles
    array

 arch/arm64/boot/dts/ti/k3-am625-sk.dts        |  3 +-
 arch/arm64/boot/dts/ti/k3-am642-evm.dts       | 11 +++---
 .../dts/ti/k3-am642-phyboard-electra-rdk.dts  |  2 +-
 arch/arm64/boot/dts/ti/k3-am642-sk.dts        | 11 +++---
 .../boot/dts/ti/k3-am65-iot2050-common.dtsi   | 17 +++++----
 .../arm64/boot/dts/ti/k3-am654-base-board.dts |  4 +--
 .../dts/ti/k3-am6548-iot2050-advanced-m2.dts  | 18 +++++-----
 .../boot/dts/ti/k3-am68-sk-base-board.dts     |  2 +-
 .../dts/ti/k3-j7200-common-proc-board.dts     |  2 +-
 arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi   |  8 ++---
 .../boot/dts/ti/k3-j721e-beagleboneai64.dts   | 36 +++++++++++--------
 .../dts/ti/k3-j721e-common-proc-board.dts     |  4 +--
 arch/arm64/boot/dts/ti/k3-j721e-sk.dts        | 20 +++++------
 arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi   | 18 +++++-----
 .../dts/ti/k3-j721s2-common-proc-board.dts    |  2 +-
 15 files changed, 80 insertions(+), 78 deletions(-)

-- 
2.40.0

[PATCH V2 01/14] arm64: dts: ti: k3-j721e-sk: Fixup reference to phandles array

[Nishanth Menon]

When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.

Signed-off-by: Nishanth Menon <nm@ti.com>
---
No Changes since v1
V1: https://lore.kernel.org/r/20230601152636.858553-2-nm@ti.com

 arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
index f650a7fd66b4..1311211c391e 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
@@ -781,7 +781,7 @@ &tscadc1 {
 
 &mcu_cpsw {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
+	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
 };
 
 &davinci_mdio {
@@ -1008,55 +1008,55 @@ mbox_c71_0: mbox-c71-0 {
 };
 
 &mcu_r5fss0_core0 {
-	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
+	mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>;
 	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
 			<&mcu_r5fss0_core0_memory_region>;
 };
 
 &mcu_r5fss0_core1 {
-	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
+	mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core1>;
 	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
 			<&mcu_r5fss0_core1_memory_region>;
 };
 
 &main_r5fss0_core0 {
-	mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
+	mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core0>;
 	memory-region = <&main_r5fss0_core0_dma_memory_region>,
 			<&main_r5fss0_core0_memory_region>;
 };
 
 &main_r5fss0_core1 {
-	mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
+	mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core1>;
 	memory-region = <&main_r5fss0_core1_dma_memory_region>,
 			<&main_r5fss0_core1_memory_region>;
 };
 
 &main_r5fss1_core0 {
-	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
+	mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core0>;
 	memory-region = <&main_r5fss1_core0_dma_memory_region>,
 			<&main_r5fss1_core0_memory_region>;
 };
 
 &main_r5fss1_core1 {
-	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
+	mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core1>;
 	memory-region = <&main_r5fss1_core1_dma_memory_region>,
 			<&main_r5fss1_core1_memory_region>;
 };
 
 &c66_0 {
-	mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
+	mboxes = <&mailbox0_cluster3>, <&mbox_c66_0>;
 	memory-region = <&c66_0_dma_memory_region>,
 			<&c66_0_memory_region>;
 };
 
 &c66_1 {
-	mboxes = <&mailbox0_cluster3 &mbox_c66_1>;
+	mboxes = <&mailbox0_cluster3>, <&mbox_c66_1>;
 	memory-region = <&c66_1_dma_memory_region>,
 			<&c66_1_memory_region>;
 };
 
 &c71_0 {
-	mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
+	mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>;
 	memory-region = <&c71_0_dma_memory_region>,
 			<&c71_0_memory_region>;
 };
-- 
2.40.0

[PATCH V2 02/14] arm64: dts: ti: k3-j721e-som-p0/common-proc-board: Fixup reference to phandles array

[Nishanth Menon]

When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.

Signed-off-by: Nishanth Menon <nm@ti.com>
---
No Changes from V1
V1: https://lore.kernel.org/r/20230601152636.858553-3-nm@ti.com

 .../boot/dts/ti/k3-j721e-common-proc-board.dts |  4 ++--
 arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi    | 18 +++++++++---------
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index 7db0603125aa..03c575e353a0 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -24,7 +24,7 @@ gpio_keys: gpio-keys {
 		compatible = "gpio-keys";
 		autorepeat;
 		pinctrl-names = "default";
-		pinctrl-0 = <&sw10_button_pins_default &sw11_button_pins_default>;
+		pinctrl-0 = <&sw10_button_pins_default>, <&sw11_button_pins_default>;
 
 		sw10: switch-10 {
 			label = "GPIO Key USER1";
@@ -646,7 +646,7 @@ exp5: gpio@20 {
 
 &mcu_cpsw {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
+	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
 };
 
 &davinci_mdio {
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
index e289d5b44356..bc15de6ab8ac 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi
@@ -256,55 +256,55 @@ mbox_c71_0: mbox-c71-0 {
 };
 
 &mcu_r5fss0_core0 {
-	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
+	mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>;
 	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
 			<&mcu_r5fss0_core0_memory_region>;
 };
 
 &mcu_r5fss0_core1 {
-	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
+	mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core1>;
 	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
 			<&mcu_r5fss0_core1_memory_region>;
 };
 
 &main_r5fss0_core0 {
-	mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
+	mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core0>;
 	memory-region = <&main_r5fss0_core0_dma_memory_region>,
 			<&main_r5fss0_core0_memory_region>;
 };
 
 &main_r5fss0_core1 {
-	mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
+	mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core1>;
 	memory-region = <&main_r5fss0_core1_dma_memory_region>,
 			<&main_r5fss0_core1_memory_region>;
 };
 
 &main_r5fss1_core0 {
-	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
+	mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core0>;
 	memory-region = <&main_r5fss1_core0_dma_memory_region>,
 			<&main_r5fss1_core0_memory_region>;
 };
 
 &main_r5fss1_core1 {
-	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
+	mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core1>;
 	memory-region = <&main_r5fss1_core1_dma_memory_region>,
 			<&main_r5fss1_core1_memory_region>;
 };
 
 &c66_0 {
-	mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
+	mboxes = <&mailbox0_cluster3>, <&mbox_c66_0>;
 	memory-region = <&c66_0_dma_memory_region>,
 			<&c66_0_memory_region>;
 };
 
 &c66_1 {
-	mboxes = <&mailbox0_cluster3 &mbox_c66_1>;
+	mboxes = <&mailbox0_cluster3>, <&mbox_c66_1>;
 	memory-region = <&c66_1_dma_memory_region>,
 			<&c66_1_memory_region>;
 };
 
 &c71_0 {
-	mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
+	mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>;
 	memory-region = <&c71_0_dma_memory_region>,
 			<&c71_0_memory_region>;
 };
-- 
2.40.0

[PATCH V2 03/14] arm64: dts: ti: k3-j721e-beagleboneai64: Move camera gpio pinctrl to gpio node

[Nishanth Menon]

Move the GPIO mux configuration needed for camera module to work to the
GPIO node instead of the I2C node.

Camera nodes are maintained as overlay files, but the common mux is
always needed to ensure that camera probes fine and ensuring the mux
is configured as part of the GPIO module allows for the multiple
overlay files to be simpler.

Cc: Robert Nelson <robertcnelson@gmail.com>
Suggested-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
---
New patch

 arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
index 37c24b077b6a..1a65d3617a29 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
@@ -593,7 +593,7 @@ &main_i2c0 {
 &main_i2c1 {
 	status = "okay";
 	pinctrl-names = "default";
-	pinctrl-0 = <&main_i2c1_pins_default &csi1_gpio_pins_default>;
+	pinctrl-0 = <&main_i2c1_pins_default>;
 	clock-frequency = <400000>;
 };
 
@@ -623,7 +623,7 @@ &main_i2c4 {
 &main_i2c5 {
 	status = "okay";
 	pinctrl-names = "default";
-	pinctrl-0 = <&main_i2c5_pins_default &csi0_gpio_pins_default>;
+	pinctrl-0 = <&main_i2c5_pins_default>;
 	clock-frequency = <400000>;
 };
 
@@ -688,6 +688,11 @@ &wkup_gpio1 {
 	status = "disabled";
 };
 
+&main_gpio0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&csi1_gpio_pins_default>, <&csi0_gpio_pins_default>;
+};
+
 &usb_serdes_mux {
 	idle-states = <1>, <1>; /* USB0 to SERDES3, USB1 to SERDES2 */
 };
-- 
2.40.0

[PATCH V2 04/14] arm64: dts: ti: k3-j721e-beagleboneai64: Move eeprom WP gpio pinctrl to eeprom node

[Nishanth Menon]

Move the eeprom WP GPIO mux configuration to be part of the eeprom node
instead of the I2C node.

Cc: Robert Nelson <robertcnelson@gmail.com>
Suggested-by: Udit Kumar <u-kumar1@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
---
New Patch

 arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
index 1a65d3617a29..a3f602e4fb45 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
@@ -639,12 +639,14 @@ &main_i2c6 {
 &wkup_i2c0 {
 	status = "okay";
 	pinctrl-names = "default";
-	pinctrl-0 = <&wkup_i2c0_pins_default &eeprom_wp_pins_default>;
+	pinctrl-0 = <&wkup_i2c0_pins_default>;
 	clock-frequency = <400000>;
 
 	eeprom@50 {
 		compatible = "atmel,24c04";
 		reg = <0x50>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&eeprom_wp_pins_default>;
 	};
 };
 
-- 
2.40.0

[PATCH V2 05/14] arm64: dts: ti: k3-j721e-beagleboneai64: Fixup reference to phandles array

[Nishanth Menon]

When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.

Cc: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
---
Changes since v1:
* Rebased on previous fixups

V1: https://lore.kernel.org/r/20230601152636.858553-4-nm@ti.com
 .../boot/dts/ti/k3-j721e-beagleboneai64.dts   | 23 ++++++++++---------
 1 file changed, 12 insertions(+), 11 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
index a3f602e4fb45..2d8fa17b7d25 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts
@@ -682,7 +682,8 @@ &main_gpio7 {
 
 &wkup_gpio0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mcu_adc0_pins_default &mcu_adc1_pins_default &mikro_bus_pins_default>;
+	pinctrl-0 = <&mcu_adc0_pins_default>, <&mcu_adc1_pins_default>,
+		    <&mikro_bus_pins_default>;
 };
 
 &wkup_gpio1 {
@@ -766,7 +767,7 @@ serdes2_usb_link: phy@1 {
 
 &usbss1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <&main_usbss1_pins_default &mcu_usbss1_pins_default>;
+	pinctrl-0 = <&main_usbss1_pins_default>, <&mcu_usbss1_pins_default>;
 	ti,vbus-divider;
 };
 
@@ -1008,55 +1009,55 @@ mbox_c71_0: mbox-c71-0 {
 };
 
 &mcu_r5fss0_core0 {
-	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
+	mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>;
 	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
 			<&mcu_r5fss0_core0_memory_region>;
 };
 
 &mcu_r5fss0_core1 {
-	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
+	mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core1>;
 	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
 			<&mcu_r5fss0_core1_memory_region>;
 };
 
 &main_r5fss0_core0 {
-	mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
+	mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core0>;
 	memory-region = <&main_r5fss0_core0_dma_memory_region>,
 			<&main_r5fss0_core0_memory_region>;
 };
 
 &main_r5fss0_core1 {
-	mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
+	mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core1>;
 	memory-region = <&main_r5fss0_core1_dma_memory_region>,
 			<&main_r5fss0_core1_memory_region>;
 };
 
 &main_r5fss1_core0 {
-	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core0>;
+	mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core0>;
 	memory-region = <&main_r5fss1_core0_dma_memory_region>,
 			<&main_r5fss1_core0_memory_region>;
 };
 
 &main_r5fss1_core1 {
-	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss1_core1>;
+	mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss1_core1>;
 	memory-region = <&main_r5fss1_core1_dma_memory_region>,
 			<&main_r5fss1_core1_memory_region>;
 };
 
 &c66_0 {
-	mboxes = <&mailbox0_cluster3 &mbox_c66_0>;
+	mboxes = <&mailbox0_cluster3>, <&mbox_c66_0>;
 	memory-region = <&c66_0_dma_memory_region>,
 			<&c66_0_memory_region>;
 };
 
 &c66_1 {
-	mboxes = <&mailbox0_cluster3 &mbox_c66_1>;
+	mboxes = <&mailbox0_cluster3>, <&mbox_c66_1>;
 	memory-region = <&c66_1_dma_memory_region>,
 			<&c66_1_memory_region>;
 };
 
 &c71_0 {
-	mboxes = <&mailbox0_cluster4 &mbox_c71_0>;
+	mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>;
 	memory-region = <&c71_0_dma_memory_region>,
 			<&c71_0_memory_region>;
 };
-- 
2.40.0

[PATCH V2 06/14] arm64: dts: ti: k3-am642-phyboard-electra-rdk: Fixup reference to phandles array

[Nishanth Menon]

When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle
and cell arguments easier to catch. Fix the outliers to be consistent
with the rest of the usage.

Cc: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Nishanth Menon <nm@ti.com>
---
No changes from V1
V1: https://lore.kernel.org/r/20230601152636.858553-5-nm@ti.com

 arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts
index 8d3114d14a8b..2258c27e99e1 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts
@@ -75,7 +75,7 @@ key-menu {
 	leds {
 		compatible = "gpio-leds";
 		pinctrl-names = "default";
-		pinctrl-0 = <&leds_pins_default &user_leds_pins_default>;
+		pinctrl-0 = <&leds_pins_default>, <&user_leds_pins_default>;
 
 		led-1 {
 			color = <LED_COLOR_ID_RED>;
-- 
2.40.0

[PATCH V2 07/14] arm64: dts: ti: k3-j7200-som/common-proc-board: Fixup reference to phandles array

[Nishanth Menon]

When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle
and cell arguments easier to catch. Fix the outliers to be consistent
with the rest of the usage.

Signed-off-by: Nishanth Menon <nm@ti.com>
---
No changes from V1
V1: https://lore.kernel.org/r/20230601152636.858553-6-nm@ti.com
 arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts | 2 +-
 arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi           | 8 ++++----
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
index 0d39d6b8cc0c..bbe77151abd6 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j7200-common-proc-board.dts
@@ -193,7 +193,7 @@ &wkup_gpio1 {
 
 &mcu_cpsw {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
+	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
 };
 
 &davinci_mdio {
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
index fa44ed4c17d5..f33212552bd9 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi
@@ -174,25 +174,25 @@ mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
 };
 
 &mcu_r5fss0_core0 {
-	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
+	mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>;
 	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
 			<&mcu_r5fss0_core0_memory_region>;
 };
 
 &mcu_r5fss0_core1 {
-	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core1>;
+	mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core1>;
 	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
 			<&mcu_r5fss0_core1_memory_region>;
 };
 
 &main_r5fss0_core0 {
-	mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core0>;
+	mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core0>;
 	memory-region = <&main_r5fss0_core0_dma_memory_region>,
 			<&main_r5fss0_core0_memory_region>;
 };
 
 &main_r5fss0_core1 {
-	mboxes = <&mailbox0_cluster1 &mbox_main_r5fss0_core1>;
+	mboxes = <&mailbox0_cluster1>, <&mbox_main_r5fss0_core1>;
 	memory-region = <&main_r5fss0_core1_dma_memory_region>,
 			<&main_r5fss0_core1_memory_region>;
 };
-- 
2.40.0

[PATCH V2 08/14] arm64: dts: ti: k3-j721s2-common-proc-board: Fixup reference to phandles array

[Nishanth Menon]

When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle
and cell arguments easier to catch. Fix the outliers to be consistent
with the rest of the usage.

Signed-off-by: Nishanth Menon <nm@ti.com>
---
No Changes from V1
V1: https://lore.kernel.org/r/20230601152636.858553-7-nm@ti.com
 arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
index b4b9edfe2d12..b0c35f354b12 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts
@@ -305,7 +305,7 @@ &main_sdhci1 {
 
 &mcu_cpsw {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
+	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
 };
 
 &davinci_mdio {
-- 
2.40.0

[PATCH V2 09/14] arm64: dts: ti: k3-am625-sk: Fixup reference to phandles array

[Nishanth Menon]

When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.

Signed-off-by: Nishanth Menon <nm@ti.com>
---
Changes Since v1:
* formatting change
V1: https://lore.kernel.org/r/20230601152636.858553-8-nm@ti.com
 arch/arm64/boot/dts/ti/k3-am625-sk.dts | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk.dts b/arch/arm64/boot/dts/ti/k3-am625-sk.dts
index 2a1adda9bff6..084b383dc96c 100644
--- a/arch/arm64/boot/dts/ti/k3-am625-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am625-sk.dts
@@ -183,8 +183,7 @@ &sdhci1 {
 
 &cpsw3g {
 	pinctrl-names = "default";
-	pinctrl-0 = <&main_rgmii1_pins_default
-		     &main_rgmii2_pins_default>;
+	pinctrl-0 = <&main_rgmii1_pins_default>, <&main_rgmii2_pins_default>;
 };
 
 &cpsw_port2 {
-- 
2.40.0

[PATCH V2 10/14] arm64: dts: ti: k3-am64-evm: Fixup reference to phandles array

[Nishanth Menon]

When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.

Signed-off-by: Nishanth Menon <nm@ti.com>
---
Changes since v1:
* formatting change
V1: https://lore.kernel.org/r/20230601152636.858553-9-nm@ti.com
 arch/arm64/boot/dts/ti/k3-am642-evm.dts | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index 39feea78a084..150f23915bf4 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -425,8 +425,7 @@ &usb0 {
 
 &cpsw3g {
 	pinctrl-names = "default";
-	pinctrl-0 = <&rgmii1_pins_default
-		     &rgmii2_pins_default>;
+	pinctrl-0 = <&rgmii1_pins_default>, <&rgmii2_pins_default>;
 };
 
 &cpsw_port1 {
@@ -518,25 +517,25 @@ &mailbox0_cluster7 {
 };
 
 &main_r5fss0_core0 {
-	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
+	mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core0>;
 	memory-region = <&main_r5fss0_core0_dma_memory_region>,
 			<&main_r5fss0_core0_memory_region>;
 };
 
 &main_r5fss0_core1 {
-	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
+	mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core1>;
 	memory-region = <&main_r5fss0_core1_dma_memory_region>,
 			<&main_r5fss0_core1_memory_region>;
 };
 
 &main_r5fss1_core0 {
-	mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
+	mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core0>;
 	memory-region = <&main_r5fss1_core0_dma_memory_region>,
 			<&main_r5fss1_core0_memory_region>;
 };
 
 &main_r5fss1_core1 {
-	mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
+	mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core1>;
 	memory-region = <&main_r5fss1_core1_dma_memory_region>,
 			<&main_r5fss1_core1_memory_region>;
 };
-- 
2.40.0

[PATCH V2 11/14] arm64: dts: ti: k3-am64-sk: Fixup reference to phandles array

[Nishanth Menon]

When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.

Signed-off-by: Nishanth Menon <nm@ti.com>
---
Changes Since v1:
* formatting change
V1: https://lore.kernel.org/r/20230601152636.858553-10-nm@ti.com
 arch/arm64/boot/dts/ti/k3-am642-sk.dts | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 2e2d40da360a..9cbe1e1a7be1 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -439,8 +439,7 @@ &usb0 {
 
 &cpsw3g {
 	pinctrl-names = "default";
-	pinctrl-0 = <&rgmii1_pins_default
-		     &rgmii2_pins_default>;
+	pinctrl-0 = <&rgmii1_pins_default>, <&rgmii2_pins_default>;
 };
 
 &cpsw_port1 {
@@ -537,25 +536,25 @@ &mailbox0_cluster7 {
 };
 
 &main_r5fss0_core0 {
-	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core0>;
+	mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core0>;
 	memory-region = <&main_r5fss0_core0_dma_memory_region>,
 			<&main_r5fss0_core0_memory_region>;
 };
 
 &main_r5fss0_core1 {
-	mboxes = <&mailbox0_cluster2 &mbox_main_r5fss0_core1>;
+	mboxes = <&mailbox0_cluster2>, <&mbox_main_r5fss0_core1>;
 	memory-region = <&main_r5fss0_core1_dma_memory_region>,
 			<&main_r5fss0_core1_memory_region>;
 };
 
 &main_r5fss1_core0 {
-	mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core0>;
+	mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core0>;
 	memory-region = <&main_r5fss1_core0_dma_memory_region>,
 			<&main_r5fss1_core0_memory_region>;
 };
 
 &main_r5fss1_core1 {
-	mboxes = <&mailbox0_cluster4 &mbox_main_r5fss1_core1>;
+	mboxes = <&mailbox0_cluster4>, <&mbox_main_r5fss1_core1>;
 	memory-region = <&main_r5fss1_core1_dma_memory_region>,
 			<&main_r5fss1_core1_memory_region>;
 };
-- 
2.40.0

[PATCH V2 12/14] arm64: dts: ti: k3-am65-iot*: Fixup reference to phandles array

[Nishanth Menon]

When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.

Cc: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
---
Changes from V1
* no change other than picking up Reviewed-by
V1: https://lore.kernel.org/r/20230601152636.858553-11-nm@ti.com

 .../boot/dts/ti/k3-am65-iot2050-common.dtsi    | 17 ++++++++---------
 .../dts/ti/k3-am6548-iot2050-advanced-m2.dts   | 18 ++++++++----------
 2 files changed, 16 insertions(+), 19 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
index 96ac2b476b11..ac5460bd0c52 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-iot2050-common.dtsi
@@ -385,13 +385,12 @@ &main_gpio0 {
 
 &wkup_gpio0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <
-		&arduino_io_d2_to_d3_pins_default
-		&arduino_i2c_aio_switch_pins_default
-		&arduino_io_oe_pins_default
-		&push_button_pins_default
-		&db9_com_mode_pins_default
-	>;
+	pinctrl-0 =
+		<&arduino_io_d2_to_d3_pins_default>,
+		<&arduino_i2c_aio_switch_pins_default>,
+		<&arduino_io_oe_pins_default>,
+		<&push_button_pins_default>,
+		<&db9_com_mode_pins_default>;
 	gpio-line-names =
 		/* 0..9 */
 		"wkup_gpio0-base", "", "", "", "UART0-mode1", "UART0-mode0",
@@ -712,11 +711,11 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
 &mcu_r5fss0_core0 {
 	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
 			<&mcu_r5fss0_core0_memory_region>;
-	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
+	mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>;
 };
 
 &mcu_r5fss0_core1 {
 	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
 			<&mcu_r5fss0_core1_memory_region>;
-	mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
+	mboxes = <&mailbox0_cluster1>, <&mbox_mcu_r5fss0_core1>;
 };
diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts
index 9400e35882a6..9209b5a7baa4 100644
--- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts
+++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced-m2.dts
@@ -66,20 +66,18 @@ AM65X_IOPAD(0x001c, PIN_INPUT_PULLUP, 7)  /* (C23) GPIO1_89 */
 
 &main_gpio0 {
 	pinctrl-names = "default";
-	pinctrl-0 = <
-		&main_m2_pcie_mux_control
-		&arduino_io_d4_to_d9_pins_default
-	>;
+	pinctrl-0 =
+		<&main_m2_pcie_mux_control>,
+		<&arduino_io_d4_to_d9_pins_default>;
 };
 
 &main_gpio1 {
 	pinctrl-names = "default";
-	pinctrl-0 = <
-		&main_m2_enable_pins_default
-		&main_pmx0_m2_config_pins_default
-		&main_pmx1_m2_config_pins_default
-		&cp2102n_reset_pin_default
-	>;
+	pinctrl-0 =
+		<&main_m2_enable_pins_default>,
+		<&main_pmx0_m2_config_pins_default>,
+		<&main_pmx1_m2_config_pins_default>,
+		<&cp2102n_reset_pin_default>;
 };
 
 /*
-- 
2.40.0

[PATCH V2 13/14] arm64: dts: ti: k3-am654-base-board: Fixup reference to phandles array

[Nishanth Menon]

When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.

Signed-off-by: Nishanth Menon <nm@ti.com>
---
No changes since V1
V1: https://lore.kernel.org/r/20230601152636.858553-12-nm@ti.com
 arch/arm64/boot/dts/ti/k3-am654-base-board.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
index 592ab2b54cb3..5bb96141a7d9 100644
--- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts
@@ -438,13 +438,13 @@ mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
 &mcu_r5fss0_core0 {
 	memory-region = <&mcu_r5fss0_core0_dma_memory_region>,
 			<&mcu_r5fss0_core0_memory_region>;
-	mboxes = <&mailbox0_cluster0 &mbox_mcu_r5fss0_core0>;
+	mboxes = <&mailbox0_cluster0>, <&mbox_mcu_r5fss0_core0>;
 };
 
 &mcu_r5fss0_core1 {
 	memory-region = <&mcu_r5fss0_core1_dma_memory_region>,
 			<&mcu_r5fss0_core1_memory_region>;
-	mboxes = <&mailbox0_cluster1 &mbox_mcu_r5fss0_core1>;
+	mboxes = <&mailbox0_cluster1>, <&mbox_mcu_r5fss0_core1>;
 };
 
 &ospi0 {
-- 
2.40.0

[PATCH V2 14/14] arm64: dts: ti: k3-am68-sk-base-board: Fixup reference to phandles array

[Nishanth Menon]

When referring to array of phandles, using <> to separate the array
entries is better notation as it makes potential errors with phandle and
cell arguments easier to catch. Fix the outliers to be consistent with
the rest of the usage.

Signed-off-by: Nishanth Menon <nm@ti.com>
---
No Changes since V1
V1: https://lore.kernel.org/r/20230601152636.858553-13-nm@ti.com
 arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
index 27a43a8ecffd..ae9116655a83 100644
--- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts
@@ -287,7 +287,7 @@ &main_sdhci1 {
 
 &mcu_cpsw {
 	pinctrl-names = "default";
-	pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
+	pinctrl-0 = <&mcu_cpsw_pins_default>, <&mcu_mdio_pins_default>;
 };
 
 &davinci_mdio {
-- 
2.40.0

Re: [PATCH V2 00/14] arm64: dts: ti: Fix up references to phandles

[Kumar, Udit]

Thanks Nishanth

On 6/6/2023 11:52 PM, Nishanth Menon wrote:
> When referring to array of phandles, using <> to separate the array
> entries is better notation as it makes potential errors with phandle and
> cell arguments easier to catch. Fix the outliers to be consistent with
> the rest of the usage.
>
> This set was caught by using: git grep '\s&' arch/arm64/boot/dts/ti/
> and manually going through the list.
>
> Changes since V1:
> * Few formatting changes included to keep consistent
> * Picked a Reviewed-by
> * ai64 gets a few fixes as part of the cleanup (patches #3, #4)
> * Picked up Reviewed-by from Jan.
>
> V1:https://lore.kernel.org/all/20230601152636.858553-1-nm@ti.com/
>
> Nishanth Menon (14):
>    arm64: dts: ti: k3-j721e-sk: Fixup reference to phandles array
>    arm64: dts: ti: k3-j721e-som-p0/common-proc-board: Fixup reference to
>      phandles array
>    arm64: dts: ti: k3-j721e-beagleboneai64: Move camera gpio pinctrl to
>      gpio node
>    arm64: dts: ti: k3-j721e-beagleboneai64: Move eeprom WP gpio pinctrl
>      to eeprom node
>    arm64: dts: ti: k3-j721e-beagleboneai64: Fixup reference to phandles
>      array
>    arm64: dts: ti: k3-am642-phyboard-electra-rdk: Fixup reference to
>      phandles array
>    arm64: dts: ti: k3-j7200-som/common-proc-board: Fixup reference to
>      phandles array
>    arm64: dts: ti: k3-j721s2-common-proc-board: Fixup reference to
>      phandles array
>    arm64: dts: ti: k3-am625-sk: Fixup reference to phandles array
>    arm64: dts: ti: k3-am64-evm: Fixup reference to phandles array
>    arm64: dts: ti: k3-am64-sk: Fixup reference to phandles array
>    arm64: dts: ti: k3-am65-iot*: Fixup reference to phandles array
>    arm64: dts: ti: k3-am654-base-board: Fixup reference to phandles array
>    arm64: dts: ti: k3-am68-sk-base-board: Fixup reference to phandles
>      array


Reviewed by : Udit Kumar <u-kumar1@ti.com>

>   arch/arm64/boot/dts/ti/k3-am625-sk.dts        |  3 +-
>   arch/arm64/boot/dts/ti/k3-am642-evm.dts       | 11 +++---
>   .../dts/ti/k3-am642-phyboard-electra-rdk.dts  |  2 +-
>   arch/arm64/boot/dts/ti/k3-am642-sk.dts        | 11 +++---
>   .../boot/dts/ti/k3-am65-iot2050-common.dtsi   | 17 +++++----
>   .../arm64/boot/dts/ti/k3-am654-base-board.dts |  4 +--
>   .../dts/ti/k3-am6548-iot2050-advanced-m2.dts  | 18 +++++-----
>   .../boot/dts/ti/k3-am68-sk-base-board.dts     |  2 +-
>   .../dts/ti/k3-j7200-common-proc-board.dts     |  2 +-
>   arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi   |  8 ++---
>   .../boot/dts/ti/k3-j721e-beagleboneai64.dts   | 36 +++++++++++--------
>   .../dts/ti/k3-j721e-common-proc-board.dts     |  4 +--
>   arch/arm64/boot/dts/ti/k3-j721e-sk.dts        | 20 +++++------
>   arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi   | 18 +++++-----
>   .../dts/ti/k3-j721s2-common-proc-board.dts    |  2 +-
>   15 files changed, 80 insertions(+), 78 deletions(-)
>

Re: [PATCH V2 00/14] arm64: dts: ti: Fix up references to phandles

[Vignesh Raghavendra]

Hi Nishanth Menon,

On Tue, 06 Jun 2023 13:22:06 -0500, Nishanth Menon wrote:
> When referring to array of phandles, using <> to separate the array
> entries is better notation as it makes potential errors with phandle and
> cell arguments easier to catch. Fix the outliers to be consistent with
> the rest of the usage.
> 
> This set was caught by using: git grep '\s&' arch/arm64/boot/dts/ti/
> and manually going through the list.
> 
> [...]

I have applied the following to branch ti-k3-dts-next on [1].
Thank you!

[01/14] arm64: dts: ti: k3-j721e-sk: Fixup reference to phandles array
        commit: 12bf41da5c3a02a9a6f8059404ba97c39a8f1852
[02/14] arm64: dts: ti: k3-j721e-som-p0/common-proc-board: Fixup reference to phandles array
        commit: 7335c987de3e4741908a032914bd3f2979898375
[03/14] arm64: dts: ti: k3-j721e-beagleboneai64: Move camera gpio pinctrl to gpio node
        commit: d528c29fa7526adf7074fb166b99df7d5fd90670
[04/14] arm64: dts: ti: k3-j721e-beagleboneai64: Move eeprom WP gpio pinctrl to eeprom node
        commit: 88875d4c70cabcb509e9836086fdf2064ef89468
[05/14] arm64: dts: ti: k3-j721e-beagleboneai64: Fixup reference to phandles array
        commit: 4a701c01e7ff96966fcf2cf9df0d3dd851197317
[06/14] arm64: dts: ti: k3-am642-phyboard-electra-rdk: Fixup reference to phandles array
        commit: 56ccd4b1eb52e153d557c7c7ae19f849e5d5c2e1
[07/14] arm64: dts: ti: k3-j7200-som/common-proc-board: Fixup reference to phandles array
        commit: a6550e2547acbcd7b01ea26d447a437140df7c43
[08/14] arm64: dts: ti: k3-j721s2-common-proc-board: Fixup reference to phandles array
        commit: 6a2baa853500d1bbe986f29aacce4a0c859bf017
[09/14] arm64: dts: ti: k3-am625-sk: Fixup reference to phandles array
        commit: 875aad10d219494bb0ef0880b1b4a33f99c98a13
[10/14] arm64: dts: ti: k3-am64-evm: Fixup reference to phandles array
        commit: bb867df51d3b7f305222405c4e01373efc8866c7
[11/14] arm64: dts: ti: k3-am64-sk: Fixup reference to phandles array
        commit: 0e97d245633bffc0ae348c95f98a2af5b973811c
[12/14] arm64: dts: ti: k3-am65-iot*: Fixup reference to phandles array
        commit: f722090aeb70ca67b5f5a37a39a26fca29664dce
[13/14] arm64: dts: ti: k3-am654-base-board: Fixup reference to phandles array
        commit: 9da060be7491cc67323b8f4386ebc4524eba5970
[14/14] arm64: dts: ti: k3-am68-sk-base-board: Fixup reference to phandles array
        commit: 918ef215db22b18b75292b6e5bcb763ce27e0483

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Vignesh