From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
To: "Peter Zijlstra (Intel)" <peterz@infradead.org>,
Juri Lelli <juri.lelli@redhat.com>,
Vincent Guittot <vincent.guittot@linaro.org>
Cc: Ricardo Neri <ricardo.neri@intel.com>,
"Ravi V. Shankar" <ravi.v.shankar@intel.com>,
Ben Segall <bsegall@google.com>,
Daniel Bristot de Oliveira <bristot@redhat.com>,
Dietmar Eggemann <dietmar.eggemann@arm.com>,
Len Brown <len.brown@intel.com>, Mel Gorman <mgorman@suse.de>,
"Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
Steven Rostedt <rostedt@goodmis.org>,
Tim Chen <tim.c.chen@linux.intel.com>,
Valentin Schneider <vschneid@redhat.com>,
Lukasz Luba <lukasz.luba@arm.com>,
Ionela Voinescu <ionela.voinescu@arm.com>,
Zhao Liu <zhao1.liu@intel.com>,
"Yuan, Perry" <Perry.Yuan@amd.com>,
x86@kernel.org,
"Joel Fernandes (Google)" <joel@joelfernandes.org>,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
Ricardo Neri <ricardo.neri-calderon@linux.intel.com>,
"Tim C . Chen" <tim.c.chen@intel.com>,
Zhao Liu <zhao1.liu@linux.intel.com>
Subject: [PATCH v4 21/24] x86/sched/ipcc: Implement model-specific checks for task classification
Date: Mon, 12 Jun 2023 21:24:19 -0700 [thread overview]
Message-ID: <20230613042422.5344-22-ricardo.neri-calderon@linux.intel.com> (raw)
In-Reply-To: <20230613042422.5344-1-ricardo.neri-calderon@linux.intel.com>
In Alder Lake and Raptor Lake, the result of thread classification is more
accurate when only one SMT sibling is busy. Classification results for
class 2 and 3 are always reliable.
Changing the classification of a task too frequently may lead to
unnecessary migrations.
Only update the class of a task if it is considered accurate and has been
constant during four consecutive user ticks.
Cc: Ben Segall <bsegall@google.com>
Cc: Daniel Bristot de Oliveira <bristot@redhat.com>
Cc: Dietmar Eggemann <dietmar.eggemann@arm.com>
Cc: Ionela Voinescu <ionela.voinescu@arm.com>
Cc: Joel Fernandes (Google) <joel@joelfernandes.org>
Cc: Len Brown <len.brown@intel.com>
Cc: Lukasz Luba <lukasz.luba@arm.com>
Cc: Mel Gorman <mgorman@suse.de>
Cc: Perry Yuan <Perry.Yuan@amd.com>
Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Tim C. Chen <tim.c.chen@intel.com>
Cc: Valentin Schneider <vschneid@redhat.com>
Cc: Zhao Liu <zhao1.liu@linux.intel.com>
Cc: x86@kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
---
Changes since v3:
* Relocated this code to arch/x86/kernel/sched_ipcc.c (Rafael)
Changes since v2:
* None
Changes since v1:
* Adjusted the result the classification of Intel Thread Director to start
at class 1. Class 0 for the scheduler means that the task is
unclassified.
* Used the new names of the IPC classes members in task_struct.
* Reworked helper functions to use sched_smt_siblings_idle() to query
the idle state of the SMT siblings of a CPU.
---
arch/x86/kernel/sched_ipcc.c | 60 +++++++++++++++++++++++++++++++++++-
1 file changed, 59 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/sched_ipcc.c b/arch/x86/kernel/sched_ipcc.c
index 685e7b3b5375..dd73fc8be49b 100644
--- a/arch/x86/kernel/sched_ipcc.c
+++ b/arch/x86/kernel/sched_ipcc.c
@@ -18,11 +18,67 @@
#include <linux/sched.h>
+#include <asm/intel-family.h>
#include <asm/topology.h>
+#define CLASS_DEBOUNCER_SKIPS 4
+
+/**
+ * debounce_and_update_class() - Process and update a task's classification
+ *
+ * @p: The task of which the classification will be updated
+ * @new_ipcc: The new IPC classification
+ *
+ * Update the classification of @p with the new value that hardware provides.
+ * Only update the classification of @p if it has been the same during
+ * CLASS_DEBOUNCER_SKIPS consecutive ticks.
+ */
+static void debounce_and_update_class(struct task_struct *p, u8 new_ipcc)
+{
+ u16 debounce_skip;
+
+ /* The class of @p changed. Only restart the debounce counter. */
+ if (p->ipcc_tmp != new_ipcc) {
+ p->ipcc_cntr = 1;
+ goto out;
+ }
+
+ /*
+ * The class of @p did not change. Update it if it has been the same
+ * for CLASS_DEBOUNCER_SKIPS user ticks.
+ */
+ debounce_skip = p->ipcc_cntr + 1;
+ if (debounce_skip < CLASS_DEBOUNCER_SKIPS)
+ p->ipcc_cntr++;
+ else
+ p->ipcc = new_ipcc;
+
+out:
+ p->ipcc_tmp = new_ipcc;
+}
+
+static bool classification_is_accurate(u8 hfi_class, bool smt_siblings_idle)
+{
+ switch (boot_cpu_data.x86_model) {
+ case INTEL_FAM6_ALDERLAKE:
+ case INTEL_FAM6_ALDERLAKE_L:
+ case INTEL_FAM6_RAPTORLAKE:
+ case INTEL_FAM6_RAPTORLAKE_P:
+ case INTEL_FAM6_RAPTORLAKE_S:
+ if (hfi_class == 3 || hfi_class == 2 || smt_siblings_idle)
+ return true;
+
+ return false;
+
+ default:
+ return false;
+ }
+}
+
void intel_update_ipcc(struct task_struct *curr)
{
u8 hfi_class;
+ bool idle;
if (intel_hfi_read_classid(&hfi_class))
return;
@@ -31,5 +87,7 @@ void intel_update_ipcc(struct task_struct *curr)
* 0 is a valid classification for Intel Thread Director. A scheduler
* IPCC class of 0 means that the task is unclassified. Adjust.
*/
- curr->ipcc = hfi_class + 1;
+ idle = sched_smt_siblings_idle(task_cpu(curr));
+ if (classification_is_accurate(hfi_class, idle))
+ debounce_and_update_class(curr, hfi_class + 1);
}
--
2.25.1
next prev parent reply other threads:[~2023-06-13 4:25 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-13 4:23 [PATCH v4 00/24] sched: Introduce classes of tasks for load balance Ricardo Neri
2023-06-13 4:23 ` [PATCH v4 01/24] sched/task_struct: Introduce IPC classes of tasks Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 02/24] sched: Add interfaces for IPC classes Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 03/24] sched/core: Initialize the IPC class of a new task Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 04/24] sched/core: Add user_tick as argument to scheduler_tick() Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 05/24] sched/core: Update the IPC class of the current task Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 06/24] sched/fair: Collect load-balancing stats for IPC classes Ricardo Neri
2023-06-14 0:29 ` Ricardo Neri
2023-06-22 9:01 ` Ionela Voinescu
2023-06-24 0:01 ` Ricardo Neri
2023-06-26 19:52 ` Tim Chen
2023-07-06 23:40 ` Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 07/24] sched/fair: Compute IPC class scores for load balancing Ricardo Neri
2023-06-22 9:02 ` Ionela Voinescu
2023-06-25 20:11 ` Ricardo Neri
2023-06-26 21:01 ` Tim Chen
2023-07-06 23:48 ` Ricardo Neri
2023-06-27 15:19 ` Ionela Voinescu
2023-06-13 4:24 ` [PATCH v4 08/24] sched/fair: Use IPCC stats to break ties between asym_packing sched groups Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 09/24] sched/fair: Use IPCC stats to break ties between fully_busy SMT groups Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 10/24] sched/fair: Use IPCC scores to select a busiest runqueue Ricardo Neri
2023-06-22 9:03 ` Ionela Voinescu
2023-06-24 0:25 ` Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 11/24] thermal: intel: hfi: Introduce Intel Thread Director classes Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 12/24] x86/cpufeatures: Add the Intel Thread Director feature definitions Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 13/24] x86/sched: Update the IPC class of the current task Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 14/24] thermal: intel: hfi: Store per-CPU IPCC scores Ricardo Neri
2023-06-29 18:53 ` Rafael J. Wysocki
2023-07-06 23:23 ` Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 15/24] thermal: intel: hfi: Report the IPC class score of a CPU Ricardo Neri
2023-06-29 18:56 ` Rafael J. Wysocki
2023-07-06 23:10 ` Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 16/24] thermal: intel: hfi: Define a default class for unclassified tasks Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 17/24] thermal: intel: hfi: Enable the Intel Thread Director Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 18/24] sched/task_struct: Add helpers for IPC classification Ricardo Neri
2023-06-22 10:20 ` Ionela Voinescu
2023-06-25 20:23 ` Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 19/24] sched/core: Initialize helpers of task classification Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 20/24] sched/fair: Introduce sched_smt_siblings_idle() Ricardo Neri
2023-06-13 4:24 ` Ricardo Neri [this message]
2023-06-13 4:24 ` [PATCH v4 22/24] x86/cpufeatures: Add feature bit for HRESET Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 23/24] x86/hreset: Configure history reset Ricardo Neri
2023-06-13 4:24 ` [PATCH v4 24/24] x86/process: Reset hardware history in context switch Ricardo Neri
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