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From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
To: "Peter Zijlstra (Intel)" <peterz@infradead.org>,
	Juri Lelli <juri.lelli@redhat.com>,
	Vincent Guittot <vincent.guittot@linaro.org>
Cc: Ricardo Neri <ricardo.neri@intel.com>,
	"Ravi V. Shankar" <ravi.v.shankar@intel.com>,
	Ben Segall <bsegall@google.com>,
	Daniel Bristot de Oliveira <bristot@redhat.com>,
	Dietmar Eggemann <dietmar.eggemann@arm.com>,
	Len Brown <len.brown@intel.com>, Mel Gorman <mgorman@suse.de>,
	"Rafael J. Wysocki" <rafael.j.wysocki@intel.com>,
	Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
	Steven Rostedt <rostedt@goodmis.org>,
	Tim Chen <tim.c.chen@linux.intel.com>,
	Valentin Schneider <vschneid@redhat.com>,
	Lukasz Luba <lukasz.luba@arm.com>,
	Ionela Voinescu <ionela.voinescu@arm.com>,
	Zhao Liu <zhao1.liu@intel.com>,
	"Yuan, Perry" <Perry.Yuan@amd.com>,
	x86@kernel.org,
	"Joel Fernandes (Google)" <joel@joelfernandes.org>,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	Ricardo Neri <ricardo.neri-calderon@linux.intel.com>,
	"Tim C . Chen" <tim.c.chen@intel.com>,
	Zhao Liu <zhao1.liu@linux.intel.com>
Subject: [PATCH v4 23/24] x86/hreset: Configure history reset
Date: Mon, 12 Jun 2023 21:24:21 -0700	[thread overview]
Message-ID: <20230613042422.5344-24-ricardo.neri-calderon@linux.intel.com> (raw)
In-Reply-To: <20230613042422.5344-1-ricardo.neri-calderon@linux.intel.com>

Configure the MSR that controls the behavior of HRESET on each logical
processor.

Cc: Ben Segall <bsegall@google.com>
Cc: Daniel Bristot de Oliveira <bristot@redhat.com>
Cc: Dietmar Eggemann <dietmar.eggemann@arm.com>
Cc: Ionela Voinescu <ionela.voinescu@arm.com>
Cc: Joel Fernandes (Google) <joel@joelfernandes.org>
Cc: Len Brown <len.brown@intel.com>
Cc: Lukasz Luba <lukasz.luba@arm.com>
Cc: Mel Gorman <mgorman@suse.de>
Cc: Perry Yuan <Perry.Yuan@amd.com>
Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Tim C. Chen <tim.c.chen@intel.com>
Cc: Valentin Schneider <vschneid@redhat.com>
Cc: Zhao Liu <zhao1.liu@linux.intel.com>
Cc: x86@kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
---
Changes since v3:
 * None

Changes since v2:
 * None

Changes since v1:
 * Marked hardware_history_features as __ro_after_init instead of
   __read_mostly. (PeterZ)
---
 arch/x86/kernel/cpu/common.c | 23 ++++++++++++++++++++++-
 1 file changed, 22 insertions(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index 8f284e185aea..d47a442900ad 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -396,6 +396,26 @@ static __always_inline void setup_umip(struct cpuinfo_x86 *c)
 	cr4_clear_bits(X86_CR4_UMIP);
 }
 
+static u32 hardware_history_features __ro_after_init;
+
+static __always_inline void setup_hreset(struct cpuinfo_x86 *c)
+{
+	if (!cpu_feature_enabled(X86_FEATURE_HRESET))
+		return;
+
+	/*
+	 * Use on all CPUs the hardware history features that the boot
+	 * CPU supports.
+	 */
+	if (c == &boot_cpu_data)
+		hardware_history_features = cpuid_ebx(0x20);
+
+	if (!hardware_history_features)
+		return;
+
+	wrmsrl(MSR_IA32_HW_HRESET_ENABLE, hardware_history_features);
+}
+
 /* These bits should not change their value after CPU init is finished. */
 static const unsigned long cr4_pinned_mask =
 	X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_UMIP |
@@ -1834,10 +1854,11 @@ static void identify_cpu(struct cpuinfo_x86 *c)
 	/* Disable the PN if appropriate */
 	squash_the_stupid_serial_number(c);
 
-	/* Set up SMEP/SMAP/UMIP */
+	/* Set up SMEP/SMAP/UMIP/HRESET */
 	setup_smep(c);
 	setup_smap(c);
 	setup_umip(c);
+	setup_hreset(c);
 
 	/* Enable FSGSBASE instructions if available. */
 	if (cpu_has(c, X86_FEATURE_FSGSBASE)) {
-- 
2.25.1


  parent reply	other threads:[~2023-06-13  4:26 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-13  4:23 [PATCH v4 00/24] sched: Introduce classes of tasks for load balance Ricardo Neri
2023-06-13  4:23 ` [PATCH v4 01/24] sched/task_struct: Introduce IPC classes of tasks Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 02/24] sched: Add interfaces for IPC classes Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 03/24] sched/core: Initialize the IPC class of a new task Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 04/24] sched/core: Add user_tick as argument to scheduler_tick() Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 05/24] sched/core: Update the IPC class of the current task Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 06/24] sched/fair: Collect load-balancing stats for IPC classes Ricardo Neri
2023-06-14  0:29   ` Ricardo Neri
2023-06-22  9:01   ` Ionela Voinescu
2023-06-24  0:01     ` Ricardo Neri
2023-06-26 19:52       ` Tim Chen
2023-07-06 23:40         ` Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 07/24] sched/fair: Compute IPC class scores for load balancing Ricardo Neri
2023-06-22  9:02   ` Ionela Voinescu
2023-06-25 20:11     ` Ricardo Neri
2023-06-26 21:01       ` Tim Chen
2023-07-06 23:48         ` Ricardo Neri
2023-06-27 15:19       ` Ionela Voinescu
2023-06-13  4:24 ` [PATCH v4 08/24] sched/fair: Use IPCC stats to break ties between asym_packing sched groups Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 09/24] sched/fair: Use IPCC stats to break ties between fully_busy SMT groups Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 10/24] sched/fair: Use IPCC scores to select a busiest runqueue Ricardo Neri
2023-06-22  9:03   ` Ionela Voinescu
2023-06-24  0:25     ` Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 11/24] thermal: intel: hfi: Introduce Intel Thread Director classes Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 12/24] x86/cpufeatures: Add the Intel Thread Director feature definitions Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 13/24] x86/sched: Update the IPC class of the current task Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 14/24] thermal: intel: hfi: Store per-CPU IPCC scores Ricardo Neri
2023-06-29 18:53   ` Rafael J. Wysocki
2023-07-06 23:23     ` Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 15/24] thermal: intel: hfi: Report the IPC class score of a CPU Ricardo Neri
2023-06-29 18:56   ` Rafael J. Wysocki
2023-07-06 23:10     ` Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 16/24] thermal: intel: hfi: Define a default class for unclassified tasks Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 17/24] thermal: intel: hfi: Enable the Intel Thread Director Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 18/24] sched/task_struct: Add helpers for IPC classification Ricardo Neri
2023-06-22 10:20   ` Ionela Voinescu
2023-06-25 20:23     ` Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 19/24] sched/core: Initialize helpers of task classification Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 20/24] sched/fair: Introduce sched_smt_siblings_idle() Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 21/24] x86/sched/ipcc: Implement model-specific checks for task classification Ricardo Neri
2023-06-13  4:24 ` [PATCH v4 22/24] x86/cpufeatures: Add feature bit for HRESET Ricardo Neri
2023-06-13  4:24 ` Ricardo Neri [this message]
2023-06-13  4:24 ` [PATCH v4 24/24] x86/process: Reset hardware history in context switch Ricardo Neri

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