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From: WANG Xuerui <kernel@xen0n.name>
To: Huacai Chen <chenhuacai@kernel.org>
Cc: WANG Rui <wangrui@loongson.cn>, Xi Ruoyao <xry111@xry111.site>,
	loongarch@lists.linux.dev, linux-kbuild@vger.kernel.org,
	llvm@lists.linux.dev, linux-kernel@vger.kernel.org,
	WANG Xuerui <git@xen0n.name>
Subject: [PATCH v2 0/9] LoongArch: Preliminary ClangBuiltLinux enablement
Date: Sun, 25 Jun 2023 02:40:46 +0800	[thread overview]
Message-ID: <20230624184055.3000636-1-kernel@xen0n.name> (raw)

From: WANG Xuerui <git@xen0n.name>

Hi,

It's been a long time since the LoongArch port was upstreamed to LLVM,
and there seems to be evidence that Linux was successfully built with
Clang inside Loongson roughly around that time; however, a lot has
changed since then, and the Linux/LoongArch codebase now makes use of
more novel features that necessitate further work. (The enablement work
is tracked at [1].)

With this patch series and a patched LLVM/Clang/LLD ([2][3][4][5]), a
working kernel can be built with `make LLVM=1`. Although currently
support for CONFIG_RELOCATABLE and CONFIG_MODULE is still TODO, we've
decided to post the series early to hopefully reduce the rebase
burden. The series contains several useful cleanups anyway.

Regarding how to merge this: because only Patch 8 is outside
arch/loongarch, I'd prefer the series to get merged through Huacai's
tree. The series applies cleanly on top of next-20230622.

Thanks go to the ClangBuiltLinux team, and LoongArch toolchain
maintainers from Loongson and the community alike; without your help
this would come much later, if at all (my free time has been steadily
dwindling this year already).

Your comments are welcome!

[1]: https://github.com/ClangBuiltLinux/linux/issues/1787
[2]: https://reviews.llvm.org/D153609
[3]: https://reviews.llvm.org/D138135
[4]: https://reviews.llvm.org/D150196
[5]: https://reviews.llvm.org/D153707

Changes in v2:

- Merged the two FCSR-related patches, now using the same approach for
  assembly and C (given that the inline asm codepath cannot be removed
  right away), also change terminology: register "class" instead of
  "bank"
- Restored signatures of invtlb wrappers for ease of rebase (potentially
  downstream product kernels?)
- Removed -G0 switches altogether (turned out it's useless upon closer
  look)
- Fix -mabi and -msoft-float handling in the CFLAGS patch; two more LLVM
  patches are now necessary (the [4] and [5] links above) but the
  original and correct CFLAGS arrangement now works

WANG Rui (2):
  LoongArch: Calculate various sizes in the linker script
  LoongArch: extable: Also recognize ABI names of registers

WANG Xuerui (7):
  LoongArch: Prepare for assemblers with proper FCSR class support
  LoongArch: Make the CPUCFG and CSR ops simple aliases of compiler
    built-ins
  LoongArch: Simplify the invtlb wrappers
  LoongArch: Remove all -G0 switches from CFLAGS
  LoongArch: Tweak CFLAGS for Clang compatibility
  LoongArch: Mark Clang LTO as working
  Makefile: Add loongarch target flag for Clang compilation

 arch/loongarch/Kconfig                 |  5 ++
 arch/loongarch/Makefile                | 10 ++--
 arch/loongarch/include/asm/fpregdef.h  |  7 +++
 arch/loongarch/include/asm/gpr-num.h   | 30 +++++++++++
 arch/loongarch/include/asm/loongarch.h | 72 +++++++-------------------
 arch/loongarch/include/asm/tlb.h       | 39 +++++++-------
 arch/loongarch/kernel/efi-header.S     |  6 +--
 arch/loongarch/kernel/head.S           |  8 +--
 arch/loongarch/kernel/traps.c          |  2 +-
 arch/loongarch/kernel/vmlinux.lds.S    |  7 +++
 arch/loongarch/lib/dump_tlb.c          |  6 +--
 arch/loongarch/vdso/Makefile           |  2 +-
 scripts/Makefile.clang                 |  1 +
 13 files changed, 107 insertions(+), 88 deletions(-)

-- 
2.40.0


             reply	other threads:[~2023-06-24 18:41 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-24 18:40 WANG Xuerui [this message]
2023-06-24 18:40 ` [PATCH v2 1/9] LoongArch: Calculate various sizes in the linker script WANG Xuerui
2023-06-24 18:40 ` [PATCH v2 2/9] LoongArch: extable: Also recognize ABI names of registers WANG Xuerui
2023-06-24 18:40 ` [PATCH v2 3/9] LoongArch: Prepare for assemblers with proper FCSR class support WANG Xuerui
2023-06-24 18:40 ` [PATCH v2 4/9] LoongArch: Make the CPUCFG and CSR ops simple aliases of compiler built-ins WANG Xuerui
2023-06-24 18:40 ` [PATCH v2 5/9] LoongArch: Simplify the invtlb wrappers WANG Xuerui
2023-06-24 18:55   ` Xi Ruoyao
2023-06-24 19:03     ` WANG Xuerui
2023-06-25  3:17   ` bibo mao
2023-06-24 18:40 ` [PATCH v2 6/9] LoongArch: Remove all -G0 switches from CFLAGS WANG Xuerui
2023-06-24 18:40 ` [PATCH v2 7/9] LoongArch: Tweak CFLAGS for Clang compatibility WANG Xuerui
2023-06-24 19:07   ` Xi Ruoyao
2023-06-25  2:13   ` Huacai Chen
2023-06-25  7:16     ` WANG Xuerui
2023-06-25  7:36       ` Xi Ruoyao
2023-06-25  7:48         ` WANG Xuerui
2023-06-25  8:13           ` Huacai Chen
2023-06-24 18:40 ` [PATCH v2 8/9] LoongArch: Mark Clang LTO as working WANG Xuerui
2023-06-24 18:40 ` [PATCH v2 9/9] Makefile: Add loongarch target flag for Clang compilation WANG Xuerui

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