From: WANG Xuerui <kernel@xen0n.name>
To: Huacai Chen <chenhuacai@kernel.org>
Cc: WANG Rui <wangrui@loongson.cn>, Xi Ruoyao <xry111@xry111.site>,
loongarch@lists.linux.dev, linux-kbuild@vger.kernel.org,
llvm@lists.linux.dev, linux-kernel@vger.kernel.org,
WANG Xuerui <git@xen0n.name>
Subject: [PATCH v2 5/9] LoongArch: Simplify the invtlb wrappers
Date: Sun, 25 Jun 2023 02:40:51 +0800 [thread overview]
Message-ID: <20230624184055.3000636-6-kernel@xen0n.name> (raw)
In-Reply-To: <20230624184055.3000636-1-kernel@xen0n.name>
From: WANG Xuerui <git@xen0n.name>
The invtlb instruction has been supported by upstream LoongArch
toolchains from day one, so ditch the raw opcode trickery and just use
plain inline asm for it.
While at it, also make the invtlb asm statements barriers, for proper
modeling of the side effects.
The signature of the other more specific invtlb wrappers contain unused
arguments right now, but these are not removed right away in order for
the patch to be focused. In the meantime, assertions are added to ensure
no accidental misuse happens before the refactor. (The more specific
wrappers cannot re-use the generic invtlb wrapper, because the ISA
manual says $zero shall be used in case a particular op does not take
the respective argument: re-using the generic wrapper would mean losing
control over the register usage.)
Signed-off-by: WANG Xuerui <git@xen0n.name>
---
arch/loongarch/include/asm/tlb.h | 39 ++++++++++++++++----------------
1 file changed, 19 insertions(+), 20 deletions(-)
diff --git a/arch/loongarch/include/asm/tlb.h b/arch/loongarch/include/asm/tlb.h
index 0dc9ee2b05d2..15750900540c 100644
--- a/arch/loongarch/include/asm/tlb.h
+++ b/arch/loongarch/include/asm/tlb.h
@@ -88,52 +88,51 @@ enum invtlb_ops {
INVTLB_GID_ADDR = 0x16,
};
-/*
- * invtlb op info addr
- * (0x1 << 26) | (0x24 << 20) | (0x13 << 15) |
- * (addr << 10) | (info << 5) | op
- */
static inline void invtlb(u32 op, u32 info, u64 addr)
{
+ BUILD_BUG_ON(!__builtin_constant_p(op));
__asm__ __volatile__(
- "parse_r addr,%0\n\t"
- "parse_r info,%1\n\t"
- ".word ((0x6498000) | (addr << 10) | (info << 5) | %2)\n\t"
- :
- : "r"(addr), "r"(info), "i"(op)
+ "invtlb %0, %1, %2\n\t"
:
+ : "i"(op), "r"(info), "r"(addr)
+ : "memory"
);
}
static inline void invtlb_addr(u32 op, u32 info, u64 addr)
{
+ BUILD_BUG_ON(!__builtin_constant_p(op));
+ BUILD_BUG_ON(!__builtin_constant_p(info) || info != 0);
__asm__ __volatile__(
- "parse_r addr,%0\n\t"
- ".word ((0x6498000) | (addr << 10) | (0 << 5) | %1)\n\t"
- :
- : "r"(addr), "i"(op)
+ "invtlb %0, $zero, %1\n\t"
:
+ : "i"(op), "r"(addr)
+ : "memory"
);
}
static inline void invtlb_info(u32 op, u32 info, u64 addr)
{
+ BUILD_BUG_ON(!__builtin_constant_p(op));
+ BUILD_BUG_ON(!__builtin_constant_p(addr) || addr != 0);
__asm__ __volatile__(
- "parse_r info,%0\n\t"
- ".word ((0x6498000) | (0 << 10) | (info << 5) | %1)\n\t"
- :
- : "r"(info), "i"(op)
+ "invtlb %0, %1, $zero\n\t"
:
+ : "i"(op), "r"(info)
+ : "memory"
);
}
static inline void invtlb_all(u32 op, u32 info, u64 addr)
{
+ BUILD_BUG_ON(!__builtin_constant_p(op));
+ BUILD_BUG_ON(!__builtin_constant_p(info) || info != 0);
+ BUILD_BUG_ON(!__builtin_constant_p(addr) || addr != 0);
__asm__ __volatile__(
- ".word ((0x6498000) | (0 << 10) | (0 << 5) | %0)\n\t"
+ "invtlb %0, $zero, $zero\n\t"
:
: "i"(op)
- :
+ : "memory"
);
}
--
2.40.0
next prev parent reply other threads:[~2023-06-24 18:42 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-24 18:40 [PATCH v2 0/9] LoongArch: Preliminary ClangBuiltLinux enablement WANG Xuerui
2023-06-24 18:40 ` [PATCH v2 1/9] LoongArch: Calculate various sizes in the linker script WANG Xuerui
2023-06-24 18:40 ` [PATCH v2 2/9] LoongArch: extable: Also recognize ABI names of registers WANG Xuerui
2023-06-24 18:40 ` [PATCH v2 3/9] LoongArch: Prepare for assemblers with proper FCSR class support WANG Xuerui
2023-06-24 18:40 ` [PATCH v2 4/9] LoongArch: Make the CPUCFG and CSR ops simple aliases of compiler built-ins WANG Xuerui
2023-06-24 18:40 ` WANG Xuerui [this message]
2023-06-24 18:55 ` [PATCH v2 5/9] LoongArch: Simplify the invtlb wrappers Xi Ruoyao
2023-06-24 19:03 ` WANG Xuerui
2023-06-25 3:17 ` bibo mao
2023-06-24 18:40 ` [PATCH v2 6/9] LoongArch: Remove all -G0 switches from CFLAGS WANG Xuerui
2023-06-24 18:40 ` [PATCH v2 7/9] LoongArch: Tweak CFLAGS for Clang compatibility WANG Xuerui
2023-06-24 19:07 ` Xi Ruoyao
2023-06-25 2:13 ` Huacai Chen
2023-06-25 7:16 ` WANG Xuerui
2023-06-25 7:36 ` Xi Ruoyao
2023-06-25 7:48 ` WANG Xuerui
2023-06-25 8:13 ` Huacai Chen
2023-06-24 18:40 ` [PATCH v2 8/9] LoongArch: Mark Clang LTO as working WANG Xuerui
2023-06-24 18:40 ` [PATCH v2 9/9] Makefile: Add loongarch target flag for Clang compilation WANG Xuerui
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230624184055.3000636-6-kernel@xen0n.name \
--to=kernel@xen0n.name \
--cc=chenhuacai@kernel.org \
--cc=git@xen0n.name \
--cc=linux-kbuild@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=llvm@lists.linux.dev \
--cc=loongarch@lists.linux.dev \
--cc=wangrui@loongson.cn \
--cc=xry111@xry111.site \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®