[PATCH 1/2] hwmon: (dimmtemp) Support more than 32 DIMMs

[PATCH 1/2] hwmon: (dimmtemp) Support more than 32 DIMMs

[Naresh Solanki]

From: Patrick Rudolph <patrick.rudolph@9elements.com>

This patch introduces support for handling more than 32 DIMMs by
utilizing bitmap operations. The changes ensure that the driver can
handle a higher number of DIMMs efficiently.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
 drivers/hwmon/peci/dimmtemp.c | 26 +++++++++++++++-----------
 1 file changed, 15 insertions(+), 11 deletions(-)

diff --git a/drivers/hwmon/peci/dimmtemp.c b/drivers/hwmon/peci/dimmtemp.c
index ed968401f93c..ce89da3937a0 100644
--- a/drivers/hwmon/peci/dimmtemp.c
+++ b/drivers/hwmon/peci/dimmtemp.c
@@ -219,19 +219,21 @@ static int check_populated_dimms(struct peci_dimmtemp *priv)
 {
 	int chan_rank_max = priv->gen_info->chan_rank_max;
 	int dimm_idx_max = priv->gen_info->dimm_idx_max;
-	u32 chan_rank_empty = 0;
-	u32 dimm_mask = 0;
-	int chan_rank, dimm_idx, ret;
+	DECLARE_BITMAP(dimm_mask, DIMM_NUMS_MAX);
+	DECLARE_BITMAP(chan_rank_empty, CHAN_RANK_MAX);
+
+	int chan_rank, dimm_idx, ret, i;
 	u32 pcs;
 
-	BUILD_BUG_ON(BITS_PER_TYPE(chan_rank_empty) < CHAN_RANK_MAX);
-	BUILD_BUG_ON(BITS_PER_TYPE(dimm_mask) < DIMM_NUMS_MAX);
 	if (chan_rank_max * dimm_idx_max > DIMM_NUMS_MAX) {
 		WARN_ONCE(1, "Unsupported number of DIMMs - chan_rank_max: %d, dimm_idx_max: %d",
 			  chan_rank_max, dimm_idx_max);
 		return -EINVAL;
 	}
 
+	bitmap_zero(dimm_mask, DIMM_NUMS_MAX);
+	bitmap_zero(chan_rank_empty, CHAN_RANK_MAX);
+
 	for (chan_rank = 0; chan_rank < chan_rank_max; chan_rank++) {
 		ret = peci_pcs_read(priv->peci_dev, PECI_PCS_DDR_DIMM_TEMP, chan_rank, &pcs);
 		if (ret) {
@@ -242,7 +244,7 @@ static int check_populated_dimms(struct peci_dimmtemp *priv)
 			 * detection to be performed at a later point in time.
 			 */
 			if (ret == -EINVAL) {
-				chan_rank_empty |= BIT(chan_rank);
+				bitmap_set(chan_rank_empty, chan_rank, 1);
 				continue;
 			}
 
@@ -251,7 +253,7 @@ static int check_populated_dimms(struct peci_dimmtemp *priv)
 
 		for (dimm_idx = 0; dimm_idx < dimm_idx_max; dimm_idx++)
 			if (__dimm_temp(pcs, dimm_idx))
-				dimm_mask |= BIT(chan_rank * dimm_idx_max + dimm_idx);
+				bitmap_set(dimm_mask, chan_rank * dimm_idx_max + dimm_idx, 1);
 	}
 
 	/*
@@ -260,7 +262,7 @@ static int check_populated_dimms(struct peci_dimmtemp *priv)
 	 * host platform boot. Retrying a couple of times lets us make sure
 	 * that the state is persistent.
 	 */
-	if (chan_rank_empty == GENMASK(chan_rank_max - 1, 0)) {
+	if (bitmap_full(chan_rank_empty, chan_rank_max)) {
 		if (priv->no_dimm_retry_count < NO_DIMM_RETRY_COUNT_MAX) {
 			priv->no_dimm_retry_count++;
 
@@ -274,14 +276,16 @@ static int check_populated_dimms(struct peci_dimmtemp *priv)
 	 * It's possible that memory training is not done yet. In this case we
 	 * defer the detection to be performed at a later point in time.
 	 */
-	if (!dimm_mask) {
+	if (bitmap_empty(dimm_mask, DIMM_NUMS_MAX)) {
 		priv->no_dimm_retry_count = 0;
 		return -EAGAIN;
 	}
 
-	dev_dbg(priv->dev, "Scanned populated DIMMs: %#x\n", dimm_mask);
+	for_each_set_bit(i, dimm_mask, DIMM_NUMS_MAX) {
+		dev_dbg(priv->dev, "Found DIMM%#x\n", i);
+	}
 
-	bitmap_from_arr32(priv->dimm_mask, &dimm_mask, DIMM_NUMS_MAX);
+	bitmap_copy(priv->dimm_mask, dimm_mask, DIMM_NUMS_MAX);
 
 	return 0;
 }

base-commit: 4dbbaf8fbdbd13adc80731b2452257857e4c2d8b
-- 
2.41.0

[PATCH 2/2] hwmon: (dimmtemp) Add Sapphire Rappids support

[Naresh Solanki]

From: Patrick Rudolph <patrick.rudolph@9elements.com>

This patch extends the functionality of the hwmon (dimmtemp) to include
support for Sapphire Rappids platform.

Sapphire Rappids can accommodate up to 8 CPUs, each with 16 DIMMs. To
accommodate this configuration, the maximum supported DIMM count is
increased, and the corresponding Sapphire Rappids ID and threshold code
are added.

The patch has been tested on a 4S system with 64 DIMMs installed.
Default thresholds are utilized for Sapphire Rappids, as accessing the
threshold requires accessing the UBOX device on Uncore bus 0, which can
only be achieved using MSR access. The non-PCI-compliant MMIO BARs are
not available for this purpose.

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
---
 drivers/hwmon/peci/dimmtemp.c | 24 +++++++++++++++++++++++-
 1 file changed, 23 insertions(+), 1 deletion(-)

diff --git a/drivers/hwmon/peci/dimmtemp.c b/drivers/hwmon/peci/dimmtemp.c
index ce89da3937a0..ea4ac5a023cf 100644
--- a/drivers/hwmon/peci/dimmtemp.c
+++ b/drivers/hwmon/peci/dimmtemp.c
@@ -30,8 +30,10 @@
 #define DIMM_IDX_MAX_ON_ICX	2
 #define CHAN_RANK_MAX_ON_ICXD	4
 #define DIMM_IDX_MAX_ON_ICXD	2
+#define CHAN_RANK_MAX_ON_SPR	128
+#define DIMM_IDX_MAX_ON_SPR	2
 
-#define CHAN_RANK_MAX		CHAN_RANK_MAX_ON_HSX
+#define CHAN_RANK_MAX		CHAN_RANK_MAX_ON_SPR
 #define DIMM_IDX_MAX		DIMM_IDX_MAX_ON_HSX
 #define DIMM_NUMS_MAX		(CHAN_RANK_MAX * DIMM_IDX_MAX)
 
@@ -534,6 +536,15 @@ read_thresholds_icx(struct peci_dimmtemp *priv, int dimm_order, int chan_rank, u
 	return 0;
 }
 
+static int
+read_thresholds_spr(struct peci_dimmtemp *priv, int dimm_order, int chan_rank, u32 *data)
+{
+	/* Use defaults */
+	*data = (95 << 16) | (90 << 8);
+
+	return 0;
+}
+
 static const struct dimm_info dimm_hsx = {
 	.chan_rank_max	= CHAN_RANK_MAX_ON_HSX,
 	.dimm_idx_max	= DIMM_IDX_MAX_ON_HSX,
@@ -576,6 +587,13 @@ static const struct dimm_info dimm_icxd = {
 	.read_thresholds = &read_thresholds_icx,
 };
 
+static const struct dimm_info dimm_spr = {
+	.chan_rank_max	= CHAN_RANK_MAX_ON_SPR,
+	.dimm_idx_max	= DIMM_IDX_MAX_ON_SPR,
+	.min_peci_revision = 0x40,
+	.read_thresholds = &read_thresholds_spr,
+};
+
 static const struct auxiliary_device_id peci_dimmtemp_ids[] = {
 	{
 		.name = "peci_cpu.dimmtemp.hsx",
@@ -601,6 +619,10 @@ static const struct auxiliary_device_id peci_dimmtemp_ids[] = {
 		.name = "peci_cpu.dimmtemp.icxd",
 		.driver_data = (kernel_ulong_t)&dimm_icxd,
 	},
+	{
+		.name = "peci_cpu.dimmtemp.spr",
+		.driver_data = (kernel_ulong_t)&dimm_spr,
+	},
 	{ }
 };
 MODULE_DEVICE_TABLE(auxiliary, peci_dimmtemp_ids);
-- 
2.41.0

Re: [PATCH 2/2] hwmon: (dimmtemp) Add Sapphire Rappids support

[Guenter Roeck]

On Mon, Jul 10, 2023 at 06:47:04PM +0200, Naresh Solanki wrote:
> From: Patrick Rudolph <patrick.rudolph@9elements.com>
> 
> This patch extends the functionality of the hwmon (dimmtemp) to include
> support for Sapphire Rappids platform.
> 
> Sapphire Rappids can accommodate up to 8 CPUs, each with 16 DIMMs. To
> accommodate this configuration, the maximum supported DIMM count is
> increased, and the corresponding Sapphire Rappids ID and threshold code
> are added.
> 
> The patch has been tested on a 4S system with 64 DIMMs installed.
> Default thresholds are utilized for Sapphire Rappids, as accessing the
> threshold requires accessing the UBOX device on Uncore bus 0, which can
> only be achieved using MSR access. The non-PCI-compliant MMIO BARs are
> not available for this purpose.
> 
> Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>

Does this patch depend on the other patch, the one introducing
Sapphire Rappids to peci/cputemp ?

Guenter

> ---
>  drivers/hwmon/peci/dimmtemp.c | 24 +++++++++++++++++++++++-
>  1 file changed, 23 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/hwmon/peci/dimmtemp.c b/drivers/hwmon/peci/dimmtemp.c
> index ce89da3937a0..ea4ac5a023cf 100644
> --- a/drivers/hwmon/peci/dimmtemp.c
> +++ b/drivers/hwmon/peci/dimmtemp.c
> @@ -30,8 +30,10 @@
>  #define DIMM_IDX_MAX_ON_ICX	2
>  #define CHAN_RANK_MAX_ON_ICXD	4
>  #define DIMM_IDX_MAX_ON_ICXD	2
> +#define CHAN_RANK_MAX_ON_SPR	128
> +#define DIMM_IDX_MAX_ON_SPR	2
>  
> -#define CHAN_RANK_MAX		CHAN_RANK_MAX_ON_HSX
> +#define CHAN_RANK_MAX		CHAN_RANK_MAX_ON_SPR
>  #define DIMM_IDX_MAX		DIMM_IDX_MAX_ON_HSX
>  #define DIMM_NUMS_MAX		(CHAN_RANK_MAX * DIMM_IDX_MAX)
>  
> @@ -534,6 +536,15 @@ read_thresholds_icx(struct peci_dimmtemp *priv, int dimm_order, int chan_rank, u
>  	return 0;
>  }
>  
> +static int
> +read_thresholds_spr(struct peci_dimmtemp *priv, int dimm_order, int chan_rank, u32 *data)
> +{
> +	/* Use defaults */
> +	*data = (95 << 16) | (90 << 8);
> +
> +	return 0;
> +}
> +
>  static const struct dimm_info dimm_hsx = {
>  	.chan_rank_max	= CHAN_RANK_MAX_ON_HSX,
>  	.dimm_idx_max	= DIMM_IDX_MAX_ON_HSX,
> @@ -576,6 +587,13 @@ static const struct dimm_info dimm_icxd = {
>  	.read_thresholds = &read_thresholds_icx,
>  };
>  
> +static const struct dimm_info dimm_spr = {
> +	.chan_rank_max	= CHAN_RANK_MAX_ON_SPR,
> +	.dimm_idx_max	= DIMM_IDX_MAX_ON_SPR,
> +	.min_peci_revision = 0x40,
> +	.read_thresholds = &read_thresholds_spr,
> +};
> +
>  static const struct auxiliary_device_id peci_dimmtemp_ids[] = {
>  	{
>  		.name = "peci_cpu.dimmtemp.hsx",
> @@ -601,6 +619,10 @@ static const struct auxiliary_device_id peci_dimmtemp_ids[] = {
>  		.name = "peci_cpu.dimmtemp.icxd",
>  		.driver_data = (kernel_ulong_t)&dimm_icxd,
>  	},
> +	{
> +		.name = "peci_cpu.dimmtemp.spr",
> +		.driver_data = (kernel_ulong_t)&dimm_spr,
> +	},
>  	{ }
>  };
>  MODULE_DEVICE_TABLE(auxiliary, peci_dimmtemp_ids);
> -- 
> 2.41.0
> 

Re: [PATCH 2/2] hwmon: (dimmtemp) Add Sapphire Rappids support

[Naresh Solanki]

Hi Guenter,

On Mon, 10 Jul 2023 at 20:48, Guenter Roeck <linux@roeck-us.net> wrote:
>
> On Mon, Jul 10, 2023 at 06:47:04PM +0200, Naresh Solanki wrote:
> > From: Patrick Rudolph <patrick.rudolph@9elements.com>
> >
> > This patch extends the functionality of the hwmon (dimmtemp) to include
> > support for Sapphire Rappids platform.
> >
> > Sapphire Rappids can accommodate up to 8 CPUs, each with 16 DIMMs. To
> > accommodate this configuration, the maximum supported DIMM count is
> > increased, and the corresponding Sapphire Rappids ID and threshold code
> > are added.
> >
> > The patch has been tested on a 4S system with 64 DIMMs installed.
> > Default thresholds are utilized for Sapphire Rappids, as accessing the
> > threshold requires accessing the UBOX device on Uncore bus 0, which can
> > only be achieved using MSR access. The non-PCI-compliant MMIO BARs are
> > not available for this purpose.
> >
> > Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
>
> Does this patch depend on the other patch, the one introducing
> Sapphire Rappids to peci/cputemp ?
Yes they are dependent.
Will bundle them together & resend.

~Naresh

>
> Guenter
>
> > ---
> >  drivers/hwmon/peci/dimmtemp.c | 24 +++++++++++++++++++++++-
> >  1 file changed, 23 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/hwmon/peci/dimmtemp.c b/drivers/hwmon/peci/dimmtemp.c
> > index ce89da3937a0..ea4ac5a023cf 100644
> > --- a/drivers/hwmon/peci/dimmtemp.c
> > +++ b/drivers/hwmon/peci/dimmtemp.c
> > @@ -30,8 +30,10 @@
> >  #define DIMM_IDX_MAX_ON_ICX  2
> >  #define CHAN_RANK_MAX_ON_ICXD        4
> >  #define DIMM_IDX_MAX_ON_ICXD 2
> > +#define CHAN_RANK_MAX_ON_SPR 128
> > +#define DIMM_IDX_MAX_ON_SPR  2
> >
> > -#define CHAN_RANK_MAX                CHAN_RANK_MAX_ON_HSX
> > +#define CHAN_RANK_MAX                CHAN_RANK_MAX_ON_SPR
> >  #define DIMM_IDX_MAX         DIMM_IDX_MAX_ON_HSX
> >  #define DIMM_NUMS_MAX                (CHAN_RANK_MAX * DIMM_IDX_MAX)
> >
> > @@ -534,6 +536,15 @@ read_thresholds_icx(struct peci_dimmtemp *priv, int dimm_order, int chan_rank, u
> >       return 0;
> >  }
> >
> > +static int
> > +read_thresholds_spr(struct peci_dimmtemp *priv, int dimm_order, int chan_rank, u32 *data)
> > +{
> > +     /* Use defaults */
> > +     *data = (95 << 16) | (90 << 8);
> > +
> > +     return 0;
> > +}
> > +
> >  static const struct dimm_info dimm_hsx = {
> >       .chan_rank_max  = CHAN_RANK_MAX_ON_HSX,
> >       .dimm_idx_max   = DIMM_IDX_MAX_ON_HSX,
> > @@ -576,6 +587,13 @@ static const struct dimm_info dimm_icxd = {
> >       .read_thresholds = &read_thresholds_icx,
> >  };
> >
> > +static const struct dimm_info dimm_spr = {
> > +     .chan_rank_max  = CHAN_RANK_MAX_ON_SPR,
> > +     .dimm_idx_max   = DIMM_IDX_MAX_ON_SPR,
> > +     .min_peci_revision = 0x40,
> > +     .read_thresholds = &read_thresholds_spr,
> > +};
> > +
> >  static const struct auxiliary_device_id peci_dimmtemp_ids[] = {
> >       {
> >               .name = "peci_cpu.dimmtemp.hsx",
> > @@ -601,6 +619,10 @@ static const struct auxiliary_device_id peci_dimmtemp_ids[] = {
> >               .name = "peci_cpu.dimmtemp.icxd",
> >               .driver_data = (kernel_ulong_t)&dimm_icxd,
> >       },
> > +     {
> > +             .name = "peci_cpu.dimmtemp.spr",
> > +             .driver_data = (kernel_ulong_t)&dimm_spr,
> > +     },
> >       { }
> >  };
> >  MODULE_DEVICE_TABLE(auxiliary, peci_dimmtemp_ids);
> > --
> > 2.41.0
> >