* [PATCH 1/3] arm64: dts: ti: k3-am64: Add phase tags marking
2023-09-11 17:28 [PATCH 0/3] arm64: dts: ti: k3-am42: Add boot phase tags marking Nishanth Menon
@ 2023-09-11 17:29 ` Nishanth Menon
2023-09-11 17:29 ` [PATCH 2/3] arm64: dts: ti: k3-am642-evm: Add boot " Nishanth Menon
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Nishanth Menon @ 2023-09-11 17:29 UTC (permalink / raw)
To: Conor Dooley, Krzysztof Kozlowski, Rob Herring, Vignesh
Cc: linux-kernel, devicetree, linux-arm-kernel, Tero Kristo,
Nishanth Menon, Tom Rini, Bryan, Praneeth, Roger Quadros
bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to describe various node usage during
boot phases with DT.
On TI K3 AM642 SoC, only esm nodes are exclusively used by R5
bootloader, rest of the dts nodes with bootph-* are used by later boot
stages also.
Add bootph-all for all other nodes that are used in the bootloader on
K3 AM642 SoC, and bootph-pre-ram is not needed specifically for any
other node in kernel dts.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 11 +++++++++++
arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi | 2 ++
arch/arm64/boot/dts/ti/k3-am64.dtsi | 2 ++
3 files changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index 0df54a741824..1933c9dd1d9f 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -38,6 +38,7 @@ sproxy-sram@1fc000 {
};
main_conf: syscon@43000000 {
+ bootph-all;
compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
reg = <0x0 0x43000000 0x0 0x20000>;
#address-cells = <1>;
@@ -45,6 +46,7 @@ main_conf: syscon@43000000 {
ranges = <0x0 0x0 0x43000000 0x20000>;
chipid@14 {
+ bootph-all;
compatible = "ti,am654-chipid";
reg = <0x00000014 0x4>;
};
@@ -96,6 +98,7 @@ gic_its: msi-controller@1820000 {
};
dmss: bus@48000000 {
+ bootph-all;
compatible = "simple-mfd";
#address-cells = <2>;
#size-cells = <2>;
@@ -105,6 +108,7 @@ dmss: bus@48000000 {
ti,sci-dev-id = <25>;
secure_proxy_main: mailbox@4d000000 {
+ bootph-all;
compatible = "ti,am654-secure-proxy";
#mbox-cells = <1>;
reg-names = "target_data", "rt", "scfg";
@@ -188,6 +192,7 @@ main_pktdma: dma-controller@485c0000 {
};
dmsc: system-controller@44043000 {
+ bootph-all;
compatible = "ti,k2g-sci";
ti,host-id = <12>;
mbox-names = "rx", "tx";
@@ -197,22 +202,26 @@ dmsc: system-controller@44043000 {
reg = <0x00 0x44043000 0x00 0xfe0>;
k3_pds: power-controller {
+ bootph-all;
compatible = "ti,sci-pm-domain";
#power-domain-cells = <2>;
};
k3_clks: clock-controller {
+ bootph-all;
compatible = "ti,k2g-sci-clk";
#clock-cells = <2>;
};
k3_reset: reset-controller {
+ bootph-all;
compatible = "ti,sci-reset";
#reset-cells = <2>;
};
};
main_pmx0: pinctrl@f4000 {
+ bootph-all;
compatible = "pinctrl-single";
reg = <0x00 0xf4000 0x00 0x2d0>;
#pinctrl-cells = <1>;
@@ -221,6 +230,7 @@ main_pmx0: pinctrl@f4000 {
};
main_timer0: timer@2400000 {
+ bootph-all;
compatible = "ti,am654-timer";
reg = <0x00 0x2400000 0x00 0x400>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
@@ -365,6 +375,7 @@ main_timer11: timer@24b0000 {
};
main_esm: esm@420000 {
+ bootph-pre-ram;
compatible = "ti,j721e-esm";
reg = <0x00 0x420000 0x00 0x1000>;
ti,esm-pins = <160>, <161>;
diff --git a/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi
index 686d49790721..b9508072bebb 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-mcu.dtsi
@@ -146,6 +146,7 @@ mcu_gpio0: gpio@4201000 {
};
mcu_pmx0: pinctrl@4084000 {
+ bootph-all;
compatible = "pinctrl-single";
reg = <0x00 0x4084000 0x00 0x84>;
#pinctrl-cells = <1>;
@@ -154,6 +155,7 @@ mcu_pmx0: pinctrl@4084000 {
};
mcu_esm: esm@4100000 {
+ bootph-pre-ram;
compatible = "ti,j721e-esm";
reg = <0x00 0x4100000 0x00 0x1000>;
ti,esm-pins = <0>, <1>;
diff --git a/arch/arm64/boot/dts/ti/k3-am64.dtsi b/arch/arm64/boot/dts/ti/k3-am64.dtsi
index 8e9c2bc70f4d..0187c42aed4f 100644
--- a/arch/arm64/boot/dts/ti/k3-am64.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64.dtsi
@@ -47,6 +47,7 @@ pmu: pmu {
};
cbass_main: bus@f4000 {
+ bootph-all;
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
@@ -85,6 +86,7 @@ cbass_main: bus@f4000 {
<0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>;
cbass_mcu: bus@4000000 {
+ bootph-all;
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
--
2.40.0
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH 2/3] arm64: dts: ti: k3-am642-evm: Add boot phase tags marking
2023-09-11 17:28 [PATCH 0/3] arm64: dts: ti: k3-am42: Add boot phase tags marking Nishanth Menon
2023-09-11 17:29 ` [PATCH 1/3] arm64: dts: ti: k3-am64: Add " Nishanth Menon
@ 2023-09-11 17:29 ` Nishanth Menon
2023-09-11 17:29 ` [PATCH 3/3] arm64: dts: ti: k3-am642-sk: " Nishanth Menon
2023-10-03 11:00 ` [PATCH 0/3] arm64: dts: ti: k3-am42: " Vignesh Raghavendra
3 siblings, 0 replies; 5+ messages in thread
From: Nishanth Menon @ 2023-09-11 17:29 UTC (permalink / raw)
To: Conor Dooley, Krzysztof Kozlowski, Rob Herring, Vignesh
Cc: linux-kernel, devicetree, linux-arm-kernel, Tero Kristo,
Nishanth Menon, Tom Rini, Bryan, Praneeth, Roger Quadros
bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to describe various node usage during
boot phases with DT.
Describe the same for AM642-evm boot devices.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
arch/arm64/boot/dts/ti/k3-am642-evm.dts | 28 +++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index b4a1f73d4fb1..d0e1191baecd 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -35,6 +35,7 @@ aliases {
};
memory@80000000 {
+ bootph-all;
device_type = "memory";
/* 2G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
@@ -108,6 +109,7 @@ rtos_ipc_memory_region: ipc-memories@a5000000 {
evm_12v0: regulator-0 {
/* main DC jack */
+ bootph-all;
compatible = "regulator-fixed";
regulator-name = "evm_12v0";
regulator-min-microvolt = <12000000>;
@@ -129,6 +131,7 @@ vsys_5v0: regulator-1 {
vsys_3v3: regulator-2 {
/* output of LM5140 */
+ bootph-all;
compatible = "regulator-fixed";
regulator-name = "vsys_3v3";
regulator-min-microvolt = <3300000>;
@@ -140,6 +143,7 @@ vsys_3v3: regulator-2 {
vdd_mmc1: regulator-3 {
/* TPS2051BD */
+ bootph-all;
compatible = "regulator-fixed";
regulator-name = "vdd_mmc1";
regulator-min-microvolt = <3300000>;
@@ -161,6 +165,7 @@ vddb: regulator-4 {
};
vtt_supply: regulator-5 {
+ bootph-all;
compatible = "regulator-fixed";
regulator-name = "vtt";
pinctrl-names = "default";
@@ -251,6 +256,7 @@ AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (E14) UART1_TXD */
};
main_uart0_pins_default: main-uart0-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */
AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */
@@ -269,6 +275,7 @@ AM64X_IOPAD(0x0218, PIN_INPUT, 0) /* (A14) SPI0_D1 */
};
main_i2c0_pins_default: main-i2c0-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */
AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */
@@ -276,6 +283,7 @@ AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */
};
main_i2c1_pins_default: main-i2c1-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */
AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */
@@ -283,6 +291,7 @@ AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */
};
mdio1_pins_default: mdio1-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
@@ -290,6 +299,7 @@ AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
};
rgmii1_pins_default: rgmii1-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM64X_IOPAD(0x01cc, PIN_INPUT, 4) /* (W5) PRG0_PRU1_GPO7.RGMII1_RD0 */
AM64X_IOPAD(0x01d4, PIN_INPUT, 4) /* (Y5) PRG0_PRU1_GPO9.RGMII1_RD1 */
@@ -307,6 +317,7 @@ AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */
};
rgmii2_pins_default: rgmii2-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM64X_IOPAD(0x0108, PIN_INPUT, 4) /* (W11) PRG1_PRU1_GPO0.RGMII2_RD0 */
AM64X_IOPAD(0x010c, PIN_INPUT, 4) /* (V11) PRG1_PRU1_GPO1.RGMII2_RD1 */
@@ -324,6 +335,7 @@ AM64X_IOPAD(0x0144, PIN_OUTPUT, 4) /* (Y11) PRG1_PRU1_GPO15.RGMII2_TX_CTL */
};
main_usb0_pins_default: main-usb0-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
>;
@@ -366,6 +378,7 @@ AM64X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (C17) MCAN1_TX */
};
ddr_vtt_pins_default: ddr-vtt-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM64X_IOPAD(0x0030, PIN_OUTPUT_PULLUP, 7) /* (L18) OSPI0_CSN1.GPIO0_12 */
>;
@@ -373,6 +386,7 @@ AM64X_IOPAD(0x0030, PIN_OUTPUT_PULLUP, 7) /* (L18) OSPI0_CSN1.GPIO0_12 */
};
&main_uart0 {
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
@@ -387,6 +401,7 @@ &main_uart1 {
};
&main_i2c0 {
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
@@ -400,12 +415,14 @@ eeprom@50 {
};
&main_i2c1 {
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
clock-frequency = <400000>;
exp1: gpio@22 {
+ bootph-all;
compatible = "ti,tca6424";
reg = <0x22>;
gpio-controller;
@@ -438,6 +455,10 @@ display@3c {
};
};
+&main_gpio0 {
+ bootph-all;
+};
+
/* mcu_gpio0 is reserved for mcu firmware usage */
&mcu_gpio0 {
status = "reserved";
@@ -467,6 +488,7 @@ &sdhci0 {
&sdhci1 {
/* SD/MMC */
+ bootph-all;
vmmc-supply = <&vdd_mmc1>;
pinctrl-names = "default";
bus-width = <4>;
@@ -476,11 +498,13 @@ &sdhci1 {
};
&usbss0 {
+ bootph-all;
ti,vbus-divider;
ti,usb2-only;
};
&usb0 {
+ bootph-all;
dr_mode = "otg";
maximum-speed = "high-speed";
pinctrl-names = "default";
@@ -488,11 +512,13 @@ &usb0 {
};
&cpsw3g {
+ bootph-all;
pinctrl-names = "default";
pinctrl-0 = <&rgmii1_pins_default>, <&rgmii2_pins_default>;
};
&cpsw_port1 {
+ bootph-all;
phy-mode = "rgmii-rxid";
phy-handle = <&cpsw3g_phy0>;
};
@@ -503,11 +529,13 @@ &cpsw_port2 {
};
&cpsw3g_mdio {
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mdio1_pins_default>;
cpsw3g_phy0: ethernet-phy@0 {
+ bootph-all;
reg = <0>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
--
2.40.0
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH 3/3] arm64: dts: ti: k3-am642-sk: Add boot phase tags marking
2023-09-11 17:28 [PATCH 0/3] arm64: dts: ti: k3-am42: Add boot phase tags marking Nishanth Menon
2023-09-11 17:29 ` [PATCH 1/3] arm64: dts: ti: k3-am64: Add " Nishanth Menon
2023-09-11 17:29 ` [PATCH 2/3] arm64: dts: ti: k3-am642-evm: Add boot " Nishanth Menon
@ 2023-09-11 17:29 ` Nishanth Menon
2023-10-03 11:00 ` [PATCH 0/3] arm64: dts: ti: k3-am42: " Vignesh Raghavendra
3 siblings, 0 replies; 5+ messages in thread
From: Nishanth Menon @ 2023-09-11 17:29 UTC (permalink / raw)
To: Conor Dooley, Krzysztof Kozlowski, Rob Herring, Vignesh
Cc: linux-kernel, devicetree, linux-arm-kernel, Tero Kristo,
Nishanth Menon, Tom Rini, Bryan, Praneeth, Roger Quadros
bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to describe various node usage during
boot phases with DT.
Describe the same for AM642-sk boot devices.
Signed-off-by: Nishanth Menon <nm@ti.com>
---
arch/arm64/boot/dts/ti/k3-am642-sk.dts | 29 ++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index 722fd285a34e..f29c8a9b59ba 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -34,6 +34,7 @@ aliases {
};
memory@80000000 {
+ bootph-pre-ram;
device_type = "memory";
/* 2G RAM */
reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
@@ -107,6 +108,7 @@ rtos_ipc_memory_region: ipc-memories@a5000000 {
vusb_main: regulator-0 {
/* USB MAIN INPUT 5V DC */
+ bootph-all;
compatible = "regulator-fixed";
regulator-name = "vusb_main5v0";
regulator-min-microvolt = <5000000>;
@@ -117,6 +119,7 @@ vusb_main: regulator-0 {
vcc_3v3_sys: regulator-1 {
/* output of LP8733xx */
+ bootph-all;
compatible = "regulator-fixed";
regulator-name = "vcc_3v3_sys";
regulator-min-microvolt = <3300000>;
@@ -128,6 +131,7 @@ vcc_3v3_sys: regulator-1 {
vdd_mmc1: regulator-2 {
/* TPS2051BD */
+ bootph-all;
compatible = "regulator-fixed";
regulator-name = "vdd_mmc1";
regulator-min-microvolt = <3300000>;
@@ -234,6 +238,7 @@ led-7 {
&main_pmx0 {
main_mmc1_pins_default: main-mmc1-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM64X_IOPAD(0x029c, PIN_INPUT_PULLUP, 0) /* (C20) MMC1_SDWP */
AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */
@@ -248,6 +253,7 @@ AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */
};
main_uart0_pins_default: main-uart0-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM64X_IOPAD(0x0238, PIN_INPUT, 0) /* (B16) UART0_CTSn */
AM64X_IOPAD(0x023c, PIN_OUTPUT, 0) /* (A16) UART0_RTSn */
@@ -257,6 +263,7 @@ AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */
};
main_uart1_pins_default: main-uart1-default-pins {
+ bootph-pre-ram;
pinctrl-single,pins = <
AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */
AM64X_IOPAD(0x024c, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */
@@ -266,12 +273,14 @@ AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (E14) UART1_TXD */
};
main_usb0_pins_default: main-usb0-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
>;
};
main_i2c0_pins_default: main-i2c0-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM64X_IOPAD(0x0260, PIN_INPUT_PULLUP, 0) /* (A18) I2C0_SCL */
AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */
@@ -279,6 +288,7 @@ AM64X_IOPAD(0x0264, PIN_INPUT_PULLUP, 0) /* (B18) I2C0_SDA */
};
main_i2c1_pins_default: main-i2c1-default-pins {
+ bootph-all;
pinctrl-single,pins = <
AM64X_IOPAD(0x0268, PIN_INPUT_PULLUP, 0) /* (C18) I2C1_SCL */
AM64X_IOPAD(0x026c, PIN_INPUT_PULLUP, 0) /* (B19) I2C1_SDA */
@@ -367,6 +377,7 @@ AM64X_IOPAD(0x00bc, PIN_INPUT, 7) /* (U8) GPIO0_46 */
};
&main_uart0 {
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_uart0_pins_default>;
@@ -375,12 +386,14 @@ &main_uart0 {
&main_uart1 {
/* main_uart1 is reserved for firmware usage */
+ bootph-pre-ram;
status = "reserved";
pinctrl-names = "default";
pinctrl-0 = <&main_uart1_pins_default>;
};
&main_i2c0 {
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
@@ -393,12 +406,14 @@ eeprom@51 {
};
&main_i2c1 {
+ bootph-all;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
clock-frequency = <400000>;
exp1: gpio@70 {
+ bootph-all;
compatible = "nxp,pca9538";
reg = <0x70>;
gpio-controller;
@@ -445,6 +460,7 @@ wlcore: wlcore@2 {
&sdhci1 {
/* SD/MMC */
+ bootph-all;
vmmc-supply = <&vdd_mmc1>;
pinctrl-names = "default";
bus-width = <4>;
@@ -454,11 +470,22 @@ &sdhci1 {
};
&serdes_ln_ctrl {
+ bootph-all;
idle-states = <AM64_SERDES0_LANE0_USB>;
};
+&serdes_refclk {
+ bootph-all;
+};
+
+&serdes_wiz0 {
+ bootph-all;
+};
+
&serdes0 {
+ bootph-all;
serdes0_usb_link: phy@0 {
+ bootph-all;
reg = <0>;
cdns,num-lanes = <1>;
#phy-cells = <0>;
@@ -468,10 +495,12 @@ serdes0_usb_link: phy@0 {
};
&usbss0 {
+ bootph-all;
ti,vbus-divider;
};
&usb0 {
+ bootph-all;
dr_mode = "host";
maximum-speed = "super-speed";
pinctrl-names = "default";
--
2.40.0
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH 0/3] arm64: dts: ti: k3-am42: Add boot phase tags marking
2023-09-11 17:28 [PATCH 0/3] arm64: dts: ti: k3-am42: Add boot phase tags marking Nishanth Menon
` (2 preceding siblings ...)
2023-09-11 17:29 ` [PATCH 3/3] arm64: dts: ti: k3-am642-sk: " Nishanth Menon
@ 2023-10-03 11:00 ` Vignesh Raghavendra
3 siblings, 0 replies; 5+ messages in thread
From: Vignesh Raghavendra @ 2023-10-03 11:00 UTC (permalink / raw)
To: Conor Dooley, Krzysztof Kozlowski, Rob Herring, Nishanth Menon
Cc: Vignesh Raghavendra, linux-kernel, devicetree, linux-arm-kernel,
Tero Kristo, Tom Rini, Bryan, Praneeth, Roger Quadros
Hi Nishanth Menon,
On Mon, 11 Sep 2023 12:28:59 -0500, Nishanth Menon wrote:
> bootph-all as phase tag was added to dt-schema
> (dtschema/schemas/bootph.yaml) to describe various node usage during
> boot phases with DT.
>
> Based on next-20230911
>
> Nishanth Menon (3):
> arm64: dts: ti: k3-am64: Add phase tags marking
> arm64: dts: ti: k3-am642-evm: Add boot phase tags marking
> arm64: dts: ti: k3-am642-sk: Add boot phase tags marking
>
> [...]
I have applied the following to branch ti-k3-dts-next on [1].
Thank you!
[1/3] arm64: dts: ti: k3-am64: Add phase tags marking
commit: 8d5bfa637f0f04a71166b9bde0ef022b08986296
[2/3] arm64: dts: ti: k3-am642-evm: Add boot phase tags marking
commit: 33830e077797ce4d7317b83a145f03bfde06ad4c
[3/3] arm64: dts: ti: k3-am642-sk: Add boot phase tags marking
commit: 4669288219a7f77c6ff992d10ce6a20660863979
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying
to this mail.
[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
--
Vignesh
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