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From: James Clark <james.clark@arm.com>
To: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.linux.dev, broonie@kernel.org, maz@kernel.org,
	suzuki.poulose@arm.com
Cc: James Clark <james.clark@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	James Morse <james.morse@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Mike Leach <mike.leach@linaro.org>,
	Leo Yan <leo.yan@linaro.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	Rob Herring <robh@kernel.org>,
	Jintack Lim <jintack.lim@linaro.org>,
	Akihiko Odaki <akihiko.odaki@daynix.com>,
	Fuad Tabba <tabba@google.com>, Joey Gouly <joey.gouly@arm.com>,
	linux-kernel@vger.kernel.org
Subject: [PATCH v2 2/6] arm64: KVM: Rename DEBUG_STATE_SAVE_TRBE to DEBUG_STATE_SAVE_TRFCR
Date: Thu,  5 Oct 2023 13:57:50 +0100	[thread overview]
Message-ID: <20231005125757.649345-3-james.clark@arm.com> (raw)
In-Reply-To: <20231005125757.649345-1-james.clark@arm.com>

This flag actually causes the TRFCR register to be saved, so rename it
to that effect.

Currently it only happens when TRBE is used, but in a later commit
TRFCR will be saved and restored even if TRBE isn't used, so the new
name will be more accurate.

Signed-off-by: James Clark <james.clark@arm.com>
---
 arch/arm64/include/asm/kvm_host.h  | 4 ++--
 arch/arm64/kvm/debug.c             | 4 ++--
 arch/arm64/kvm/hyp/nvhe/debug-sr.c | 4 ++--
 3 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index 0ca4b34f8513..e36f7e8a76ce 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -741,8 +741,8 @@ struct kvm_vcpu_arch {
 #define DEBUG_DIRTY		__vcpu_single_flag(iflags, BIT(4))
 /* Save SPE context if active  */
 #define DEBUG_STATE_SAVE_SPE	__vcpu_single_flag(iflags, BIT(5))
-/* Save TRBE context if active  */
-#define DEBUG_STATE_SAVE_TRBE	__vcpu_single_flag(iflags, BIT(6))
+/* Save TRFCR and disable TRBE if necessary */
+#define DEBUG_STATE_SAVE_TRFCR	__vcpu_single_flag(iflags, BIT(6))
 /* vcpu running in HYP context */
 #define VCPU_HYP_CONTEXT	__vcpu_single_flag(iflags, BIT(7))
 
diff --git a/arch/arm64/kvm/debug.c b/arch/arm64/kvm/debug.c
index 8725291cb00a..6a1bad1a921b 100644
--- a/arch/arm64/kvm/debug.c
+++ b/arch/arm64/kvm/debug.c
@@ -334,11 +334,11 @@ void kvm_arch_vcpu_load_debug_state_flags(struct kvm_vcpu *vcpu)
 	/* Check if we have TRBE implemented and available at the host */
 	if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_TraceBuffer_SHIFT) &&
 	    !(read_sysreg_s(SYS_TRBIDR_EL1) & TRBIDR_EL1_P))
-		vcpu_set_flag(vcpu, DEBUG_STATE_SAVE_TRBE);
+		vcpu_set_flag(vcpu, DEBUG_STATE_SAVE_TRFCR);
 }
 
 void kvm_arch_vcpu_put_debug_state_flags(struct kvm_vcpu *vcpu)
 {
 	vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_SPE);
-	vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_TRBE);
+	vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_TRFCR);
 }
diff --git a/arch/arm64/kvm/hyp/nvhe/debug-sr.c b/arch/arm64/kvm/hyp/nvhe/debug-sr.c
index 4558c02eb352..89c208112eb7 100644
--- a/arch/arm64/kvm/hyp/nvhe/debug-sr.c
+++ b/arch/arm64/kvm/hyp/nvhe/debug-sr.c
@@ -85,7 +85,7 @@ void __debug_save_host_buffers_nvhe(struct kvm_vcpu *vcpu)
 	if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_SPE))
 		__debug_save_spe(&vcpu->arch.host_debug_state.pmscr_el1);
 	/* Disable and flush Self-Hosted Trace generation */
-	if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRBE))
+	if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRFCR))
 		__debug_save_trace(&vcpu->arch.host_debug_state.trfcr_el1);
 }
 
@@ -98,7 +98,7 @@ void __debug_restore_host_buffers_nvhe(struct kvm_vcpu *vcpu)
 {
 	if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_SPE))
 		__debug_restore_spe(vcpu->arch.host_debug_state.pmscr_el1);
-	if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRBE))
+	if (vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRFCR))
 		__debug_restore_trace(vcpu->arch.host_debug_state.trfcr_el1);
 }
 
-- 
2.34.1


  parent reply	other threads:[~2023-10-05 15:57 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-05 12:57 [PATCH v2 0/6] kvm/coresight: Support exclude guest and exclude host James Clark
2023-10-05 12:57 ` [PATCH v2 1/6] arm64/sysreg: Move TRFCR definitions to sysreg James Clark
2023-10-05 16:39   ` Suzuki K Poulose
2023-10-05 12:57 ` James Clark [this message]
2023-10-05 16:41   ` [PATCH v2 2/6] arm64: KVM: Rename DEBUG_STATE_SAVE_TRBE to DEBUG_STATE_SAVE_TRFCR Suzuki K Poulose
2023-10-05 18:04     ` Suzuki K Poulose
2023-10-19 16:57       ` James Clark
2023-10-05 12:57 ` [PATCH v2 3/6] arm64: KVM: Move SPE and trace registers to the sysreg array James Clark
2023-10-05 16:48   ` Suzuki K Poulose
2023-10-05 12:57 ` [PATCH v2 4/6] arm64: KVM: Add interface to set guest value for TRFCR register James Clark
2023-10-05 16:58   ` Suzuki K Poulose
2023-10-19 16:58     ` James Clark
2023-10-05 12:57 ` [PATCH v2 5/6] arm64: KVM: Write TRFCR value on guest switch with nVHE James Clark
2023-10-05 18:05   ` Suzuki K Poulose
2023-10-19 16:59     ` James Clark
2023-10-05 12:57 ` [PATCH v2 6/6] coresight: Pass guest TRFCR value to KVM James Clark

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