From: James Clark <james.clark@arm.com>
To: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Oliver Upton <oliver.upton@linux.dev>,
James Morse <james.morse@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>, Mike Leach <mike.leach@linaro.org>,
Leo Yan <leo.yan@linaro.org>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Anshuman Khandual <anshuman.khandual@arm.com>,
Rob Herring <robh@kernel.org>,
Akihiko Odaki <akihiko.odaki@daynix.com>,
Fuad Tabba <tabba@google.com>, Joey Gouly <joey.gouly@arm.com>,
linux-kernel@vger.kernel.org, coresight@lists.linaro.org,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev,
broonie@kernel.org, maz@kernel.org
Subject: Re: [PATCH v2 4/6] arm64: KVM: Add interface to set guest value for TRFCR register
Date: Thu, 19 Oct 2023 17:58:11 +0100 [thread overview]
Message-ID: <ac2e17c6-4a8d-24bb-a41d-c57ab60e8415@arm.com> (raw)
In-Reply-To: <de8083f5-eb62-77d2-236b-6ad46ceb6142@arm.com>
On 05/10/2023 17:58, Suzuki K Poulose wrote:
> On 05/10/2023 13:57, James Clark wrote:
>> Add an interface for the Coresight driver to use to set the value of the
>> TRFCR register for the guest. This register controls the exclude
>
>
>
>> settings for trace at different exception levels, and is used to
>> honor the exclude_host and exclude_guest parameters from the Perf
>> session. This will be used to later write TRFCR_EL1 on nVHE at guest
>> switch. For VHE, TRFCR_EL1 is written immediately. Because guest writes
>
> minor nit: May be it would be clearer to say:
>
> For VHE, the host trace is controlled by TRFCR_EL2 and thus we can
> write to the TRFCR_EL1 immediately. Because, ...
>
>> to the register are trapped, the value will persist and can't be
>> modified.
>>
>> The settings must be copied to the vCPU before each run in the same
>> way that PMU events are because the per-cpu struct isn't accessible in
>
> super minor nit:
>
> way that PMU events are, because ...
> >> protected mode.
>>
>> Now that both guest and host values are saved, rename trfcr_el1 to
>> host_trfcr_el1 to make it clear that's the value that should be restored
>
> This seems obsolete ? I couldn't find any reference to host_trfcr_el1
> anywhere ?
>
Yep it was from an old version. I remove it and fixed all of the above too.
> Otherwise looks good to me.
>
> Suzuki
>
>
>> on return to the host.
>>
>> Signed-off-by: James Clark <james.clark@arm.com>
>> ---
>> arch/arm64/include/asm/kvm_host.h | 3 +++
>> arch/arm64/kvm/arm.c | 1 +
>> arch/arm64/kvm/debug.c | 26 ++++++++++++++++++++++++++
>> 3 files changed, 30 insertions(+)
>>
>> diff --git a/arch/arm64/include/asm/kvm_host.h
>> b/arch/arm64/include/asm/kvm_host.h
>> index b5200f199692..8f2b4ec8ea61 100644
>> --- a/arch/arm64/include/asm/kvm_host.h
>> +++ b/arch/arm64/include/asm/kvm_host.h
>> @@ -1123,6 +1123,8 @@ void kvm_arch_vcpu_put_debug_state_flags(struct
>> kvm_vcpu *vcpu);
>> void kvm_set_pmu_events(u32 set, struct perf_event_attr *attr);
>> void kvm_clr_pmu_events(u32 clr);
>> bool kvm_set_pmuserenr(u64 val);
>> +void kvm_etm_set_guest_trfcr(u64 trfcr_guest);
>> +void kvm_etm_update_vcpu_events(struct kvm_vcpu *vcpu);
>> #else
>> static inline void kvm_set_pmu_events(u32 set, struct
>> perf_event_attr *attr) {}
>> static inline void kvm_clr_pmu_events(u32 clr) {}
>> @@ -1130,6 +1132,7 @@ static inline bool kvm_set_pmuserenr(u64 val)
>> {
>> return false;
>> }
>> +static inline void kvm_etm_set_guest_trfcr(u64 trfcr_guest) {}
>> #endif
>> void kvm_vcpu_load_sysregs_vhe(struct kvm_vcpu *vcpu);
>> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
>> index 78b0970eb8e6..22fab356b88f 100644
>> --- a/arch/arm64/kvm/arm.c
>> +++ b/arch/arm64/kvm/arm.c
>> @@ -1012,6 +1012,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
>> kvm_vgic_flush_hwstate(vcpu);
>> kvm_pmu_update_vcpu_events(vcpu);
>> + kvm_etm_update_vcpu_events(vcpu);
>> /*
>> * Ensure we set mode to IN_GUEST_MODE after we disable
>> diff --git a/arch/arm64/kvm/debug.c b/arch/arm64/kvm/debug.c
>> index 6a1bad1a921b..19e722359154 100644
>> --- a/arch/arm64/kvm/debug.c
>> +++ b/arch/arm64/kvm/debug.c
>> @@ -23,6 +23,12 @@
>> static DEFINE_PER_CPU(u64, mdcr_el2);
>> +/*
>> + * Per CPU value for TRFCR that should be applied to any guest vcpu
>> that may
>> + * run on that core in the future.
>> + */
>> +static DEFINE_PER_CPU(u64, guest_trfcr);
>> +
>> /**
>> * save/restore_guest_debug_regs
>> *
>> @@ -342,3 +348,23 @@ void kvm_arch_vcpu_put_debug_state_flags(struct
>> kvm_vcpu *vcpu)
>> vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_SPE);
>> vcpu_clear_flag(vcpu, DEBUG_STATE_SAVE_TRFCR);
>> }
>> +
>> +void kvm_etm_set_guest_trfcr(u64 trfcr_guest)
>> +{
>> + if (has_vhe())
>> + write_sysreg_s(trfcr_guest, SYS_TRFCR_EL12);
>> + else
>> + *this_cpu_ptr(&guest_trfcr) = trfcr_guest;
>> +}
>> +EXPORT_SYMBOL_GPL(kvm_etm_set_guest_trfcr);
>> +
>> +/*
>> + * Updates the vcpu's view of the etm events for this cpu. Must be
>> + * called before every vcpu run after disabling interrupts, to ensure
>> + * that an interrupt cannot fire and update the structure.
>> + */
>> +void kvm_etm_update_vcpu_events(struct kvm_vcpu *vcpu)
>> +{
>> + if (!has_vhe() && vcpu_get_flag(vcpu, DEBUG_STATE_SAVE_TRFCR))
>> + ctxt_sys_reg(&vcpu->arch.ctxt, TRFCR_EL1) =
>> *this_cpu_ptr(&guest_trfcr);
>> +}
>
next prev parent reply other threads:[~2023-10-19 16:58 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-05 12:57 [PATCH v2 0/6] kvm/coresight: Support exclude guest and exclude host James Clark
2023-10-05 12:57 ` [PATCH v2 1/6] arm64/sysreg: Move TRFCR definitions to sysreg James Clark
2023-10-05 16:39 ` Suzuki K Poulose
2023-10-05 12:57 ` [PATCH v2 2/6] arm64: KVM: Rename DEBUG_STATE_SAVE_TRBE to DEBUG_STATE_SAVE_TRFCR James Clark
2023-10-05 16:41 ` Suzuki K Poulose
2023-10-05 18:04 ` Suzuki K Poulose
2023-10-19 16:57 ` James Clark
2023-10-05 12:57 ` [PATCH v2 3/6] arm64: KVM: Move SPE and trace registers to the sysreg array James Clark
2023-10-05 16:48 ` Suzuki K Poulose
2023-10-05 12:57 ` [PATCH v2 4/6] arm64: KVM: Add interface to set guest value for TRFCR register James Clark
2023-10-05 16:58 ` Suzuki K Poulose
2023-10-19 16:58 ` James Clark [this message]
2023-10-05 12:57 ` [PATCH v2 5/6] arm64: KVM: Write TRFCR value on guest switch with nVHE James Clark
2023-10-05 18:05 ` Suzuki K Poulose
2023-10-19 16:59 ` James Clark
2023-10-05 12:57 ` [PATCH v2 6/6] coresight: Pass guest TRFCR value to KVM James Clark
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