[PATCH v2] x86/mm: fix pg_level_to_pfn for 5-level paging mode.

[PATCH v2] x86/mm: fix pg_level_to_pfn for 5-level paging mode.

[Ashish Kalra]

From: Ashish Kalra <ashish.kalra@amd.com>

Add support for 5-level paging in pg_level_to_pfn().

This issue was found during working on SNP guest kexec support,
this helper function is used during early boot stage for setting
of C-bit on the PTEs and additionally need this same helper for
switching shared pages to private during guest kexec.

Signed-off-by: Ashish Kalra <ashish.kalra@amd.com>
---
 arch/x86/mm/mem_encrypt_amd.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/x86/mm/mem_encrypt_amd.c b/arch/x86/mm/mem_encrypt_amd.c
index 6faea41e99b6..45914568596a 100644
--- a/arch/x86/mm/mem_encrypt_amd.c
+++ b/arch/x86/mm/mem_encrypt_amd.c
@@ -267,6 +267,10 @@ static unsigned long pg_level_to_pfn(int level, pte_t *kpte, pgprot_t *ret_prot)
 		pfn = pud_pfn(*(pud_t *)kpte);
 		prot = pud_pgprot(*(pud_t *)kpte);
 		break;
+	case PG_LEVEL_512G:
+		pfn = p4d_pfn(*(p4d_t *)kpte);
+		prot = p4d_pgprot(*(p4d_t *)kpte);
+		break;
 	default:
 		WARN_ONCE(1, "Invalid level for kpte\n");
 		return 0;
-- 
2.25.1

Re: [PATCH v2] x86/mm: fix pg_level_to_pfn for 5-level paging mode.

[Borislav Petkov]

On Wed, Oct 18, 2023 at 07:06:26PM +0000, Ashish Kalra wrote:
> From: Ashish Kalra <ashish.kalra@amd.com>
> 
> Add support for 5-level paging in pg_level_to_pfn().
> 
> This issue was found during working on SNP guest kexec support,
> this helper function is used during early boot stage for setting
> of C-bit on the PTEs and additionally need this same helper for
> switching shared pages to private during guest kexec.

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Thx.

-- 
Regards/Gruss,
    Boris.

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