mirror of https://lore.kernel.org/lkml/
 help / color / mirror / Atom feed
From: James Clark <james.clark@arm.com>
To: linux-arm-kernel@lists.infradead.org,
	linux-perf-users@vger.kernel.org, suzuki.poulose@arm.com,
	will@kernel.org, mark.rutland@arm.com, anshuman.khandual@arm.com
Cc: namhyung@gmail.com, James Clark <james.clark@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Jonathan Corbet <corbet@lwn.net>,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
	Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Russell King <linux@armlinux.org.uk>,
	Marc Zyngier <maz@kernel.org>,
	Oliver Upton <oliver.upton@linux.dev>,
	James Morse <james.morse@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Shuah Khan <shuah@kernel.org>,
	Zaid Al-Bassam <zalbassam@google.com>,
	Raghavendra Rao Ananta <rananta@google.com>,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	kvmarm@lists.linux.dev, kvm@vger.kernel.org,
	linux-kselftest@vger.kernel.org
Subject: [PATCH v7 00/11] arm64: perf: Add support for event counting threshold
Date: Mon, 11 Dec 2023 16:13:12 +0000	[thread overview]
Message-ID: <20231211161331.1277825-1-james.clark@arm.com> (raw)

Changes since v6:

  * Remove inlines from arm_pmuv3.c
  * Use format attribute mechanism from SPE
  * Re-arrange attributes so that threshold comes last and can
    potentially be extended
  * Emit an error if the max threshold is exceeded rather than clamping
  * Convert all register fields to GENMASK

Changes since v5:
  * Restructure the docs and add some more explanations
  * PMMIR.WIDTH -> PMMIR.THWIDTH in one comment
  * Don't write EVTYPER.TC if TH is 0. Doesn't have any functional
    effect but it might be a bit easier to understand the code.
  * Expand the format field #define names

Changes since v4:

  * Rebase onto v6.7-rc1, it no longer depends on kvmarm/next
  * Remove change that moved ARMV8_PMU_EVTYPE_MASK to the asm files.
    This actually depended on those files being included in a certain
    order with arm_pmuv3.h to avoid circular includes. Now the
    definition is done programmatically in arm_pmuv3.c instead.

Changes since v3:

  * Drop #include changes to KVM source files because since
    commit bc512d6a9b92 ("KVM: arm64: Make PMEVTYPER<n>_EL0.NSH RES0 if
    EL2 isn't advertised"), KVM doesn't use ARMV8_PMU_EVTYPE_MASK
    anymore

Changes since v2:

  * Split threshold_control attribute into two, threshold_compare and
    threshold_count so that it's easier to use
  * Add some notes to the first commit message and the cover letter
    about the behavior in KVM
  * Update the docs commit with regards to the split attribute
 
Changes since v1:

  * Fix build on aarch32 by disabling FEAT_PMUv3_TH and splitting event
    type mask between the platforms
  * Change armv8pmu_write_evtype() to take unsigned long instead of u64
    so it isn't unnecessarily wide on aarch32
  * Add UL suffix to aarch64 event type mask definition

----

FEAT_PMUv3_TH (Armv8.8) is a new feature that allows conditional
counting of PMU events depending on how much the event increments on
a single cycle. Two new config fields for perf_event_open have been
added, and a PMU cap file for reading the max_threshold. See the second
commit message and the docs in the last commit for more details.

The feature is not currently supported on KVM guests, and PMMIR is set
to read as zero, so it's not advertised as available. But it can be
added at a later time. Writes to PMEVTYPER.TC and TH from guests are
already RES0.

The change has been validated on the Arm FVP model:

  # Zero values, works as expected (as before).
  $ perf stat -e dtlb_walk/threshold=0,threshold_compare=0/ -- true

    5962      dtlb_walk/threshold=0,threshold_compare=0/

  # Threshold >= 255 causes count to be 0 because dtlb_walk doesn't
  # increase by more than 1 per cycle.
  $ perf stat -e dtlb_walk/threshold=255,threshold_compare=2/ -- true

    0      dtlb_walk/threshold=255,threshold_compare=2/
  
  # Keeping comparison as >= but lowering the threshold to 1 makes the
  # count return.
  $ perf stat -e dtlb_walk/threshold=1,threshold_compare=2/ -- true

    6329      dtlb_walk/threshold=1,threshold_compare=2/

James Clark (11):
  arm: perf: Remove inlines from arm_pmuv3.c
  arm: perf/kvm: Use GENMASK for ARMV8_PMU_PMCR_N
  arm: perf: Use GENMASK for PMMIR fields
  arm: perf: Convert remaining fields to use GENMASK
  arm64: perf: Include threshold control fields in PMEVTYPER mask
  arm: pmu: Share user ABI format mechanism with SPE
  perf/arm_dmc620: Remove duplicate format attribute #defines
  KVM: selftests: aarch64: Update tools copy of arm_pmuv3.h
  arm: pmu: Move error message and -EOPNOTSUPP to individual PMUs
  arm64: perf: Add support for event counting threshold
  Documentation: arm64: Document the PMU event counting threshold
    feature

 Documentation/arch/arm64/perf.rst             |  72 +++++++
 arch/arm/kernel/perf_event_v7.c               |   6 +-
 arch/arm64/kvm/pmu-emul.c                     |   8 +-
 arch/arm64/kvm/sys_regs.c                     |   4 +-
 drivers/perf/apple_m1_cpu_pmu.c               |   6 +-
 drivers/perf/arm_dmc620_pmu.c                 |  22 +--
 drivers/perf/arm_pmu.c                        |  11 +-
 drivers/perf/arm_pmuv3.c                      | 175 ++++++++++++++----
 drivers/perf/arm_spe_pmu.c                    |  22 ---
 include/linux/perf/arm_pmu.h                  |  22 +++
 include/linux/perf/arm_pmuv3.h                |  34 ++--
 tools/include/perf/arm_pmuv3.h                |  43 +++--
 .../kvm/aarch64/vpmu_counter_access.c         |   5 +-
 13 files changed, 296 insertions(+), 134 deletions(-)

-- 
2.34.1


             reply	other threads:[~2023-12-11 16:13 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-11 16:13 James Clark [this message]
2023-12-11 16:13 ` [PATCH v7 01/11] arm: perf: Remove inlines from arm_pmuv3.c James Clark
2023-12-11 16:13 ` [PATCH v7 02/11] arm: perf/kvm: Use GENMASK for ARMV8_PMU_PMCR_N James Clark
2023-12-11 16:13 ` [PATCH v7 03/11] arm: perf: Use GENMASK for PMMIR fields James Clark
2023-12-11 16:13 ` [PATCH v7 04/11] arm: perf: Convert remaining fields to use GENMASK James Clark
2023-12-11 16:13 ` [PATCH v7 05/11] arm64: perf: Include threshold control fields in PMEVTYPER mask James Clark
2023-12-15 12:08   ` Uwe Kleine-König
2023-12-15 12:43     ` James Clark
2023-12-11 16:13 ` [PATCH v7 06/11] arm: pmu: Share user ABI format mechanism with SPE James Clark
2023-12-11 16:13 ` [PATCH v7 07/11] perf/arm_dmc620: Remove duplicate format attribute #defines James Clark
2023-12-11 16:13 ` [PATCH v7 08/11] KVM: selftests: aarch64: Update tools copy of arm_pmuv3.h James Clark
2023-12-11 16:13 ` [PATCH v7 09/11] arm: pmu: Move error message and -EOPNOTSUPP to individual PMUs James Clark
2023-12-11 16:13 ` [PATCH v7 10/11] arm64: perf: Add support for event counting threshold James Clark
2023-12-11 16:13 ` [PATCH v7 11/11] Documentation: arm64: Document the PMU event counting threshold feature James Clark
2023-12-12 17:20 ` [PATCH v7 00/11] arm64: perf: Add support for event counting threshold Will Deacon

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20231211161331.1277825-1-james.clark@arm.com \
    --to=james.clark@arm.com \
    --cc=acme@kernel.org \
    --cc=adrian.hunter@intel.com \
    --cc=alexander.shishkin@linux.intel.com \
    --cc=anshuman.khandual@arm.com \
    --cc=catalin.marinas@arm.com \
    --cc=corbet@lwn.net \
    --cc=irogers@google.com \
    --cc=james.morse@arm.com \
    --cc=jolsa@kernel.org \
    --cc=kvm@vger.kernel.org \
    --cc=kvmarm@lists.linux.dev \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-doc@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-kselftest@vger.kernel.org \
    --cc=linux-perf-users@vger.kernel.org \
    --cc=linux@armlinux.org.uk \
    --cc=mark.rutland@arm.com \
    --cc=maz@kernel.org \
    --cc=mingo@redhat.com \
    --cc=namhyung@gmail.com \
    --cc=namhyung@kernel.org \
    --cc=oliver.upton@linux.dev \
    --cc=pbonzini@redhat.com \
    --cc=peterz@infradead.org \
    --cc=rananta@google.com \
    --cc=shuah@kernel.org \
    --cc=suzuki.poulose@arm.com \
    --cc=will@kernel.org \
    --cc=yuzenghui@huawei.com \
    --cc=zalbassam@google.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox

all inboxes | Powered by JetHome®