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From: James Clark <james.clark@arm.com>
To: "Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Will Deacon" <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-perf-users@vger.kernel.org, suzuki.poulose@arm.com,
	mark.rutland@arm.com, anshuman.khandual@arm.com,
	namhyung@gmail.com, Catalin Marinas <catalin.marinas@arm.com>,
	Jonathan Corbet <corbet@lwn.net>,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Jiri Olsa <jolsa@kernel.org>, Namhyung Kim <namhyung@kernel.org>,
	Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	Russell King <linux@armlinux.org.uk>,
	Marc Zyngier <maz@kernel.org>,
	Oliver Upton <oliver.upton@linux.dev>,
	James Morse <james.morse@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Paolo Bonzini <pbonzini@redhat.com>,
	Shuah Khan <shuah@kernel.org>,
	Zaid Al-Bassam <zalbassam@google.com>,
	Raghavendra Rao Ananta <rananta@google.com>,
	linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
	kvmarm@lists.linux.dev, kvm@vger.kernel.org,
	linux-kselftest@vger.kernel.org
Subject: Re: [PATCH v7 05/11] arm64: perf: Include threshold control fields in PMEVTYPER mask
Date: Fri, 15 Dec 2023 12:43:44 +0000	[thread overview]
Message-ID: <732aa152-53cc-1101-4292-0906266a4c01@arm.com> (raw)
In-Reply-To: <20231215120817.h2f3akgv72zhrtqo@pengutronix.de>



On 15/12/2023 12:08, Uwe Kleine-König wrote:
> Hello,
> 
> On Mon, Dec 11, 2023 at 04:13:17PM +0000, James Clark wrote:
>> FEAT_PMUv3_TH (Armv8.8) adds two new fields to PMEVTYPER, so include
>> them in the mask. These aren't writable on 32 bit kernels as they are in
>> the high part of the register, so only include them for arm64.
>>
>> It would be difficult to do this statically in the asm header files for
>> each platform without resulting in circular includes or #ifdefs inline
>> in the code. For that reason the ARMV8_PMU_EVTYPE_MASK definition has
>> been removed and the mask is constructed programmatically.
>>
>> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
>> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com>
>> Signed-off-by: James Clark <james.clark@arm.com>
> 
> This change is in today's next as commit
> 3115ee021bfb04efde2e96507bfcc1330261a6a1. this breaks allmodconfig
> building on ARCH=arm:
> 
> 	In file included from include/linux/ratelimit_types.h:5,
> 			 from include/linux/printk.h:9,
> 			 from include/asm-generic/bug.h:22,
> 			 from arch/arm/include/asm/bug.h:60,
> 			 from include/linux/bug.h:5,
> 			 from include/linux/mmdebug.h:5,
> 			 from include/linux/percpu.h:5,
> 			 from include/asm-generic/irq_regs.h:11,
> 			 from ./arch/arm/include/generated/asm/irq_regs.h:1,
> 			 from drivers/perf/arm_pmuv3.c:11:
> 	drivers/perf/arm_pmuv3.c: In function ‘armv8pmu_write_evtype’:
> 	include/linux/bits.h:34:29: error: left shift count >= width of type [-Werror=shift-count-overflow]
> 	   34 |         (((~UL(0)) - (UL(1) << (l)) + 1) & \
> 	      |                             ^~
> 	include/linux/bits.h:37:38: note: in expansion of macro ‘__GENMASK’
> 	   37 |         (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
> 	      |                                      ^~~~~~~~~
> 	include/linux/perf/arm_pmuv3.h:238:33: note: in expansion of macro ‘GENMASK’
> 	  238 | #define ARMV8_PMU_EVTYPE_TC     GENMASK(63, 61)
> 	      |                                 ^~~~~~~
> 	drivers/perf/arm_pmuv3.c:567:25: note: in expansion of macro ‘ARMV8_PMU_EVTYPE_TC’
> 	  567 |                 mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH;
> 	      |                         ^~~~~~~~~~~~~~~~~~~
> 	include/linux/bits.h:35:18: error: right shift count is negative [-Werror=shift-count-negative]
> 	   35 |          (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
> 	      |                  ^~
> 	include/linux/bits.h:37:38: note: in expansion of macro ‘__GENMASK’
> 	   37 |         (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
> 	      |                                      ^~~~~~~~~
> 	include/linux/perf/arm_pmuv3.h:238:33: note: in expansion of macro ‘GENMASK’
> 	  238 | #define ARMV8_PMU_EVTYPE_TC     GENMASK(63, 61)
> 	      |                                 ^~~~~~~
> 	drivers/perf/arm_pmuv3.c:567:25: note: in expansion of macro ‘ARMV8_PMU_EVTYPE_TC’
> 	  567 |                 mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH;
> 	      |                         ^~~~~~~~~~~~~~~~~~~
> 	include/linux/bits.h:34:29: error: left shift count >= width of type [-Werror=shift-count-overflow]
> 	   34 |         (((~UL(0)) - (UL(1) << (l)) + 1) & \
> 	      |                             ^~
> 	include/linux/bits.h:37:38: note: in expansion of macro ‘__GENMASK’
> 	   37 |         (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
> 	      |                                      ^~~~~~~~~
> 	include/linux/perf/arm_pmuv3.h:237:33: note: in expansion of macro ‘GENMASK’
> 	  237 | #define ARMV8_PMU_EVTYPE_TH     GENMASK(43, 32)
> 	      |                                 ^~~~~~~
> 	drivers/perf/arm_pmuv3.c:567:47: note: in expansion of macro ‘ARMV8_PMU_EVTYPE_TH’
> 	  567 |                 mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH;
> 	      |                                               ^~~~~~~~~~~~~~~~~~~
> 	include/linux/bits.h:35:18: error: right shift count is negative [-Werror=shift-count-negative]
> 	   35 |          (~UL(0) >> (BITS_PER_LONG - 1 - (h))))
> 	      |                  ^~
> 	include/linux/bits.h:37:38: note: in expansion of macro ‘__GENMASK’
> 	   37 |         (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l))
> 	      |                                      ^~~~~~~~~
> 	include/linux/perf/arm_pmuv3.h:237:33: note: in expansion of macro ‘GENMASK’
> 	  237 | #define ARMV8_PMU_EVTYPE_TH     GENMASK(43, 32)
> 	      |                                 ^~~~~~~
> 	drivers/perf/arm_pmuv3.c:567:47: note: in expansion of macro ‘ARMV8_PMU_EVTYPE_TH’
> 	  567 |                 mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH;
> 	      |                                               ^~~~~~~~~~~~~~~~~~~
> 
> I guess that's easy to fix but I didn't look into that.
> 
> Best regards
> Uwe
> 

Thanks for the report. I see that the build is only broken with GCC and
is working with LLVM. I will look into a fix.

Worst case the if can be changed to an #ifdef

James

  reply	other threads:[~2023-12-15 12:43 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-11 16:13 [PATCH v7 00/11] arm64: perf: Add support for event counting threshold James Clark
2023-12-11 16:13 ` [PATCH v7 01/11] arm: perf: Remove inlines from arm_pmuv3.c James Clark
2023-12-11 16:13 ` [PATCH v7 02/11] arm: perf/kvm: Use GENMASK for ARMV8_PMU_PMCR_N James Clark
2023-12-11 16:13 ` [PATCH v7 03/11] arm: perf: Use GENMASK for PMMIR fields James Clark
2023-12-11 16:13 ` [PATCH v7 04/11] arm: perf: Convert remaining fields to use GENMASK James Clark
2023-12-11 16:13 ` [PATCH v7 05/11] arm64: perf: Include threshold control fields in PMEVTYPER mask James Clark
2023-12-15 12:08   ` Uwe Kleine-König
2023-12-15 12:43     ` James Clark [this message]
2023-12-11 16:13 ` [PATCH v7 06/11] arm: pmu: Share user ABI format mechanism with SPE James Clark
2023-12-11 16:13 ` [PATCH v7 07/11] perf/arm_dmc620: Remove duplicate format attribute #defines James Clark
2023-12-11 16:13 ` [PATCH v7 08/11] KVM: selftests: aarch64: Update tools copy of arm_pmuv3.h James Clark
2023-12-11 16:13 ` [PATCH v7 09/11] arm: pmu: Move error message and -EOPNOTSUPP to individual PMUs James Clark
2023-12-11 16:13 ` [PATCH v7 10/11] arm64: perf: Add support for event counting threshold James Clark
2023-12-11 16:13 ` [PATCH v7 11/11] Documentation: arm64: Document the PMU event counting threshold feature James Clark
2023-12-12 17:20 ` [PATCH v7 00/11] arm64: perf: Add support for event counting threshold Will Deacon

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