From: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
To: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>
Cc: Len Brown <len.brown@intel.com>,
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
Stanislaw Gruszka <stanislaw.gruszka@linux.intel.com>,
Zhao Liu <zhao1.liu@intel.com>,
Zhuocheng Ding <zhuocheng.ding@intel.com>,
x86@kernel.org, linux-pm@vger.kernel.org,
linux-kernel@vger.kernel.org,
Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
Subject: [PATCH 1/9] thermal: intel: hfi: Relocate bit definitions of HFI registers
Date: Fri, 2 Feb 2024 20:05:07 -0800 [thread overview]
Message-ID: <20240203040515.23947-2-ricardo.neri-calderon@linux.intel.com> (raw)
In-Reply-To: <20240203040515.23947-1-ricardo.neri-calderon@linux.intel.com>
From: Zhao Liu <zhao1.liu@intel.com>
KVM needs the definition of several HFI registers for the virtualization
of HFI. Move the necessary definitions to msr-index.h
While here, use BIT_ULL() and GENMASK_ULL() since the relevant registers
have 64 bits. Also, remove the "_BIT" suffix for consistency in naming.
No functional changes.
Cc: Len Brown <len.brown@intel.com>
Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: Stanislaw Gruszka <stanislaw.gruszka@linux.intel.com>
Cc: Zhuocheng Ding <zhuocheng.ding@intel.com>
Cc: x86@kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
---
arch/x86/include/asm/msr-index.h | 4 ++++
drivers/thermal/intel/intel_hfi.c | 10 +++-------
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index f1bd7b91b3c6..46983fb0b5b3 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -1143,7 +1143,11 @@
/* Hardware Feedback Interface */
#define MSR_IA32_HW_FEEDBACK_PTR 0x17d0
+#define HW_FEEDBACK_PTR_VALID BIT_ULL(0)
+#define HW_FEEDBACK_PTR_RESERVED_MASK GENMASK_ULL(11, 1)
+
#define MSR_IA32_HW_FEEDBACK_CONFIG 0x17d1
+#define HW_FEEDBACK_CONFIG_HFI_ENABLE BIT_ULL(0)
/* x2APIC locked status */
#define MSR_IA32_XAPIC_DISABLE_STATUS 0xBD
diff --git a/drivers/thermal/intel/intel_hfi.c b/drivers/thermal/intel/intel_hfi.c
index 3b04c6ec4fca..9aaca74bdfa3 100644
--- a/drivers/thermal/intel/intel_hfi.c
+++ b/drivers/thermal/intel/intel_hfi.c
@@ -48,10 +48,6 @@
#include "../thermal_netlink.h"
-/* Hardware Feedback Interface MSR configuration bits */
-#define HW_FEEDBACK_PTR_VALID_BIT BIT(0)
-#define HW_FEEDBACK_CONFIG_HFI_ENABLE_BIT BIT(0)
-
/* CPUID detection and enumeration definitions for HFI */
#define CPUID_HFI_LEAF 6
@@ -356,7 +352,7 @@ static void hfi_enable(void)
u64 msr_val;
rdmsrl(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val);
- msr_val |= HW_FEEDBACK_CONFIG_HFI_ENABLE_BIT;
+ msr_val |= HW_FEEDBACK_CONFIG_HFI_ENABLE;
wrmsrl(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val);
}
@@ -366,7 +362,7 @@ static void hfi_set_hw_table(struct hfi_instance *hfi_instance)
u64 msr_val;
hw_table_pa = virt_to_phys(hfi_instance->hw_table);
- msr_val = hw_table_pa | HW_FEEDBACK_PTR_VALID_BIT;
+ msr_val = hw_table_pa | HW_FEEDBACK_PTR_VALID;
wrmsrl(MSR_IA32_HW_FEEDBACK_PTR, msr_val);
}
@@ -377,7 +373,7 @@ static void hfi_disable(void)
int i;
rdmsrl(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val);
- msr_val &= ~HW_FEEDBACK_CONFIG_HFI_ENABLE_BIT;
+ msr_val &= ~HW_FEEDBACK_CONFIG_HFI_ENABLE;
wrmsrl(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val);
/*
--
2.25.1
next prev parent reply other threads:[~2024-02-03 4:04 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-03 4:05 [PATCH 0/9] thermal: intel: hfi: Prework for the virtualization of HFI Ricardo Neri
2024-02-03 4:05 ` Ricardo Neri [this message]
2024-02-03 4:05 ` [PATCH 2/9] thermal: intel: hfi: Introduce the hfi_table structure Ricardo Neri
2024-02-03 4:05 ` [PATCH 3/9] thermal: intel: hfi: Move selected data structures to a header file Ricardo Neri
2024-02-03 4:05 ` [PATCH 4/9] thermal: intel: hfi: Introduce Intel Thread Director classes Ricardo Neri
2024-02-03 4:05 ` [PATCH 5/9] x86/cpufeatures: Add the Intel Thread Director feature definitions Ricardo Neri
2024-02-03 4:05 ` [PATCH 6/9] thermal: intel: hfi: Enable Intel Thread Director Ricardo Neri
2024-02-05 10:28 ` Stanislaw Gruszka
2024-02-06 2:57 ` Ricardo Neri
2024-02-03 4:05 ` [PATCH 7/9] x86/cpufeatures: Add feature bit for HRESET Ricardo Neri
2024-02-03 9:36 ` Borislav Petkov
2024-02-04 3:49 ` Ricardo Neri
2024-02-03 4:05 ` [PATCH 8/9] x86/hreset: Configure history reset Ricardo Neri
2024-02-03 9:38 ` Borislav Petkov
2024-02-04 3:55 ` Ricardo Neri
2024-02-04 10:49 ` Borislav Petkov
2024-02-06 2:37 ` Ricardo Neri
2024-02-03 4:05 ` [PATCH 9/9] x86/cpu: Introduce interface to reset hardware history Ricardo Neri
2024-02-03 9:40 ` Borislav Petkov
2024-02-04 3:48 ` Ricardo Neri
2024-02-06 2:59 ` [PATCH 0/9] thermal: intel: hfi: Prework for the virtualization of HFI Ricardo Neri
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240203040515.23947-2-ricardo.neri-calderon@linux.intel.com \
--to=ricardo.neri-calderon@linux.intel.com \
--cc=len.brown@intel.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=rafael.j.wysocki@intel.com \
--cc=srinivas.pandruvada@linux.intel.com \
--cc=stanislaw.gruszka@linux.intel.com \
--cc=x86@kernel.org \
--cc=zhao1.liu@intel.com \
--cc=zhuocheng.ding@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®