* [PATCH 0/2] Add OSPI and Ethernet support on J722S EVM
@ 2024-02-16 13:55 Vaishnav Achath
2024-02-16 13:55 ` [PATCH 1/2] arm64: dts: ti: k3-j722s-evm: Enable CPSW3G RGMII1 Vaishnav Achath
2024-02-16 13:55 ` [PATCH 2/2] arm64: dts: ti: k3-j722s-evm: Enable OSPI NOR support Vaishnav Achath
0 siblings, 2 replies; 6+ messages in thread
From: Vaishnav Achath @ 2024-02-16 13:55 UTC (permalink / raw)
To: nm, vigneshr, kristo, robh, krzysztof.kozlowski+dt, conor+dt
Cc: linux-arm-kernel, devicetree, linux-kernel, vaishnav.a, u-kumar1,
s-vadapalli
Hi,
This series adds support for Ethernet and OSPI NOR flash on J722S EVM.
EVM Schematics are available at:
https://www.ti.com/lit/zip/sprr495
Test log (6.8.0-rc4-next-20240216):
https://gist.github.com/vaishnavachath/b04e3be90af4cdec59fb0d9cc72441b9
For those interested, more details about this SoC can be found in the
Technical Reference Manual here:
https://www.ti.com/lit/zip/sprujb3
Thanks and Regards,
Vaishnav
Siddharth Vadapalli (1):
arm64: dts: ti: k3-j722s-evm: Enable CPSW3G RGMII1
Vaishnav Achath (1):
arm64: dts: ti: k3-j722s-evm: Enable OSPI NOR support
arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 132 ++++++++++++++++++++++++
1 file changed, 132 insertions(+)
--
2.34.1
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 1/2] arm64: dts: ti: k3-j722s-evm: Enable CPSW3G RGMII1 2024-02-16 13:55 [PATCH 0/2] Add OSPI and Ethernet support on J722S EVM Vaishnav Achath @ 2024-02-16 13:55 ` Vaishnav Achath 2024-02-16 13:55 ` [PATCH 2/2] arm64: dts: ti: k3-j722s-evm: Enable OSPI NOR support Vaishnav Achath 1 sibling, 0 replies; 6+ messages in thread From: Vaishnav Achath @ 2024-02-16 13:55 UTC (permalink / raw) To: nm, vigneshr, kristo, robh, krzysztof.kozlowski+dt, conor+dt Cc: linux-arm-kernel, devicetree, linux-kernel, vaishnav.a, u-kumar1, s-vadapalli From: Siddharth Vadapalli <s-vadapalli@ti.com> Enable MAC Port 1 of CPSW3G instance of CPSW Ethernet Switch in RGMII-RXID mode of operation. Port 2 is not connected on the EVM, thus keep it disabled. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> --- arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 53 +++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts index b4f2fee53a97..9e12a6e9111f 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts @@ -8,6 +8,7 @@ /dts-v1/; +#include <dt-bindings/net/ti-dp83867.h> #include "k3-j722s.dtsi" / { @@ -160,6 +161,58 @@ J722S_IOPAD(0x0240, PIN_INPUT, 0) /* (B24) MMC1_SDCD */ >; bootph-all; }; + + mdio_pins_default: mdio-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AC24) MDIO0_MDC */ + J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */ + >; + }; + + rgmii1_pins_default: rgmii1-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x014c, PIN_INPUT, 0) /* (AC25) RGMII1_RD0 */ + J722S_IOPAD(0x0150, PIN_INPUT, 0) /* (AD27) RGMII1_RD1 */ + J722S_IOPAD(0x0154, PIN_INPUT, 0) /* (AE24) RGMII1_RD2 */ + J722S_IOPAD(0x0158, PIN_INPUT, 0) /* (AE26) RGMII1_RD3 */ + J722S_IOPAD(0x0148, PIN_INPUT, 0) /* (AE27) RGMII1_RXC */ + J722S_IOPAD(0x0144, PIN_INPUT, 0) /* (AD23) RGMII1_RX_CTL */ + J722S_IOPAD(0x0134, PIN_OUTPUT, 0) /* (AF27) RGMII1_TD0 */ + J722S_IOPAD(0x0138, PIN_OUTPUT, 0) /* (AE23) RGMII1_TD1 */ + J722S_IOPAD(0x013c, PIN_OUTPUT, 0) /* (AG25) RGMII1_TD2 */ + J722S_IOPAD(0x0140, PIN_OUTPUT, 0) /* (AF24) RGMII1_TD3 */ + J722S_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AG26) RGMII1_TXC */ + J722S_IOPAD(0x012c, PIN_OUTPUT, 0) /* (AF25) RGMII1_TX_CTL */ + >; + }; +}; + +&cpsw3g { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_pins_default>; +}; + +&cpsw3g_mdio { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&mdio_pins_default>; + + cpsw3g_phy0: ethernet-phy@0 { + reg = <0>; + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; + ti,min-output-impedance; + }; +}; + +&cpsw_port1 { + phy-mode = "rgmii-rxid"; + phy-handle = <&cpsw3g_phy0>; +}; + +&cpsw_port2 { + status = "disabled"; }; &main_gpio1 { -- 2.34.1 ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 2/2] arm64: dts: ti: k3-j722s-evm: Enable OSPI NOR support 2024-02-16 13:55 [PATCH 0/2] Add OSPI and Ethernet support on J722S EVM Vaishnav Achath 2024-02-16 13:55 ` [PATCH 1/2] arm64: dts: ti: k3-j722s-evm: Enable CPSW3G RGMII1 Vaishnav Achath @ 2024-02-16 13:55 ` Vaishnav Achath 2024-02-19 5:55 ` Kumar, Udit 1 sibling, 1 reply; 6+ messages in thread From: Vaishnav Achath @ 2024-02-16 13:55 UTC (permalink / raw) To: nm, vigneshr, kristo, robh, krzysztof.kozlowski+dt, conor+dt Cc: linux-arm-kernel, devicetree, linux-kernel, vaishnav.a, u-kumar1, s-vadapalli J722S EVM has S28HS512T 64 MiB Octal SPI NOR flash connected to the OSPI interface, add support for the flash and describe the partition information as per bootloader. Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> --- arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 79 +++++++++++++++++++++++++ 1 file changed, 79 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts index 9e12a6e9111f..b1c6499c0c9d 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts @@ -169,6 +169,23 @@ J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */ >; }; + ospi0_pins_default: ospi0-default-pins { + pinctrl-single,pins = < + J722S_IOPAD(0x0000, PIN_OUTPUT, 0) /* (P23) OSPI0_CLK */ + J722S_IOPAD(0x002c, PIN_OUTPUT, 0) /* (M25) OSPI0_CSn0 */ + J722S_IOPAD(0x000c, PIN_INPUT, 0) /* (L25) OSPI0_D0 */ + J722S_IOPAD(0x0010, PIN_INPUT, 0) /* (N24) OSPI0_D1 */ + J722S_IOPAD(0x0014, PIN_INPUT, 0) /* (N25) OSPI0_D2 */ + J722S_IOPAD(0x0018, PIN_INPUT, 0) /* (M24) OSPI0_D3 */ + J722S_IOPAD(0x001c, PIN_INPUT, 0) /* (N21) OSPI0_D4 */ + J722S_IOPAD(0x0020, PIN_INPUT, 0) /* (N22) OSPI0_D5 */ + J722S_IOPAD(0x0024, PIN_INPUT, 0) /* (P21) OSPI0_D6 */ + J722S_IOPAD(0x0028, PIN_INPUT, 0) /* (N20) OSPI0_D7 */ + J722S_IOPAD(0x0008, PIN_INPUT, 0) /* (P22) OSPI0_DQS */ + >; + bootph-all; + }; + rgmii1_pins_default: rgmii1-default-pins { pinctrl-single,pins = < J722S_IOPAD(0x014c, PIN_INPUT, 0) /* (AC25) RGMII1_RD0 */ @@ -290,6 +307,68 @@ exp1: gpio@23 { }; }; +&ospi0 { + pinctrl-names = "default"; + pinctrl-0 = <&ospi0_pins_default>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + spi-max-frequency = <25000000>; + cdns,tshsl-ns = <60>; + cdns,tsd2d-ns = <60>; + cdns,tchsh-ns = <60>; + cdns,tslch-ns = <60>; + cdns,read-delay = <4>; + bootph-all; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "ospi.tiboot3"; + reg = <0x00 0x80000>; + }; + + partition@80000 { + label = "ospi.tispl"; + reg = <0x80000 0x200000>; + }; + + partition@280000 { + label = "ospi.u-boot"; + reg = <0x280000 0x400000>; + }; + + partition@680000 { + label = "ospi.env"; + reg = <0x680000 0x40000>; + }; + + partition@6c0000 { + label = "ospi.env.backup"; + reg = <0x6c0000 0x40000>; + }; + + partition@800000 { + label = "ospi.rootfs"; + reg = <0x800000 0x37c0000>; + }; + + partition@3fc0000 { + label = "ospi.phypattern"; + reg = <0x3fc0000 0x40000>; + }; + }; + }; + +}; + &sdhci1 { /* SD/MMC */ vmmc-supply = <&vdd_mmc1>; -- 2.34.1 ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] arm64: dts: ti: k3-j722s-evm: Enable OSPI NOR support 2024-02-16 13:55 ` [PATCH 2/2] arm64: dts: ti: k3-j722s-evm: Enable OSPI NOR support Vaishnav Achath @ 2024-02-19 5:55 ` Kumar, Udit 2024-02-19 8:23 ` Vaishnav Achath 0 siblings, 1 reply; 6+ messages in thread From: Kumar, Udit @ 2024-02-19 5:55 UTC (permalink / raw) To: Vaishnav Achath, nm, vigneshr, kristo, robh, krzysztof.kozlowski+dt, conor+dt Cc: linux-arm-kernel, devicetree, linux-kernel, s-vadapalli Hi Vaishnav On 2/16/2024 7:25 PM, Vaishnav Achath wrote: > J722S EVM has S28HS512T 64 MiB Octal SPI NOR flash connected > to the OSPI interface, add support for the flash and describe > the partition information as per bootloader. > > Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> > --- > arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 79 +++++++++++++++++++++++++ > 1 file changed, 79 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts > index 9e12a6e9111f..b1c6499c0c9d 100644 > --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts > +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts > @@ -169,6 +169,23 @@ J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) MDIO0_MDIO */ > >; > }; > > + ospi0_pins_default: ospi0-default-pins { > + pinctrl-single,pins = < > + J722S_IOPAD(0x0000, PIN_OUTPUT, 0) /* (P23) OSPI0_CLK */ > + J722S_IOPAD(0x002c, PIN_OUTPUT, 0) /* (M25) OSPI0_CSn0 */ > + J722S_IOPAD(0x000c, PIN_INPUT, 0) /* (L25) OSPI0_D0 */ > + J722S_IOPAD(0x0010, PIN_INPUT, 0) /* (N24) OSPI0_D1 */ > + J722S_IOPAD(0x0014, PIN_INPUT, 0) /* (N25) OSPI0_D2 */ > + J722S_IOPAD(0x0018, PIN_INPUT, 0) /* (M24) OSPI0_D3 */ > + J722S_IOPAD(0x001c, PIN_INPUT, 0) /* (N21) OSPI0_D4 */ > + J722S_IOPAD(0x0020, PIN_INPUT, 0) /* (N22) OSPI0_D5 */ > + J722S_IOPAD(0x0024, PIN_INPUT, 0) /* (P21) OSPI0_D6 */ > + J722S_IOPAD(0x0028, PIN_INPUT, 0) /* (N20) OSPI0_D7 */ > + J722S_IOPAD(0x0008, PIN_INPUT, 0) /* (P22) OSPI0_DQS */ Could you check, Pin name in comments For example, Schematic says L22 is for OSPI0_DQS , but comments says P22 However offsets are good . > + >; > + bootph-all; > + }; > + > rgmii1_pins_default: rgmii1-default-pins { > pinctrl-single,pins = < > J722S_IOPAD(0x014c, PIN_INPUT, 0) /* (AC25) RGMII1_RD0 */ > @@ -290,6 +307,68 @@ exp1: gpio@23 { > }; > }; > > +&ospi0 { > + pinctrl-names = "default"; > + pinctrl-0 = <&ospi0_pins_default>; > + status = "okay"; > + > + flash@0 { > + compatible = "jedec,spi-nor"; > + reg = <0x0>; > + spi-tx-bus-width = <8>; > + spi-rx-bus-width = <8>; > + spi-max-frequency = <25000000>; > + cdns,tshsl-ns = <60>; > + cdns,tsd2d-ns = <60>; > + cdns,tchsh-ns = <60>; > + cdns,tslch-ns = <60>; > + cdns,read-delay = <4>; > + bootph-all; > + > + partitions { > + compatible = "fixed-partitions"; > + #address-cells = <1>; > + #size-cells = <1>; > + > + partition@0 { > + label = "ospi.tiboot3"; > + reg = <0x00 0x80000>; > + }; I suggest to keep 1MB to accommodate future size increase > + > + partition@80000 { > + label = "ospi.tispl"; > + reg = <0x80000 0x200000>; > + }; > + > + partition@280000 { > + label = "ospi.u-boot"; > + reg = <0x280000 0x400000>; > + }; > + > + partition@680000 { > + label = "ospi.env"; > + reg = <0x680000 0x40000>; > + }; > + > + partition@6c0000 { > + label = "ospi.env.backup"; > + reg = <0x6c0000 0x40000>; > + }; > + > + partition@800000 { > + label = "ospi.rootfs"; > + reg = <0x800000 0x37c0000>; > + }; > + > + partition@3fc0000 { > + label = "ospi.phypattern"; > + reg = <0x3fc0000 0x40000>; > + }; > + }; > + }; > + > +}; > + > &sdhci1 { > /* SD/MMC */ > vmmc-supply = <&vdd_mmc1>; ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] arm64: dts: ti: k3-j722s-evm: Enable OSPI NOR support 2024-02-19 5:55 ` Kumar, Udit @ 2024-02-19 8:23 ` Vaishnav Achath 2024-02-19 8:45 ` Kumar, Udit 0 siblings, 1 reply; 6+ messages in thread From: Vaishnav Achath @ 2024-02-19 8:23 UTC (permalink / raw) To: Kumar, Udit, nm, vigneshr, kristo, robh, krzysztof.kozlowski+dt, conor+dt Cc: linux-arm-kernel, devicetree, linux-kernel, s-vadapalli Hi Udit, On 19/02/24 11:25, Kumar, Udit wrote: > Hi Vaishnav > > On 2/16/2024 7:25 PM, Vaishnav Achath wrote: >> J722S EVM has S28HS512T 64 MiB Octal SPI NOR flash connected >> to the OSPI interface, add support for the flash and describe >> the partition information as per bootloader. >> >> Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> >> --- >> arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 79 +++++++++++++++++++++++++ >> 1 file changed, 79 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts >> b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts >> index 9e12a6e9111f..b1c6499c0c9d 100644 >> --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts >> +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts >> @@ -169,6 +169,23 @@ J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) >> MDIO0_MDIO */ >> >; >> }; >> + ospi0_pins_default: ospi0-default-pins { >> + pinctrl-single,pins = < >> + J722S_IOPAD(0x0000, PIN_OUTPUT, 0) /* (P23) OSPI0_CLK */ >> + J722S_IOPAD(0x002c, PIN_OUTPUT, 0) /* (M25) OSPI0_CSn0 */ >> + J722S_IOPAD(0x000c, PIN_INPUT, 0) /* (L25) OSPI0_D0 */ >> + J722S_IOPAD(0x0010, PIN_INPUT, 0) /* (N24) OSPI0_D1 */ >> + J722S_IOPAD(0x0014, PIN_INPUT, 0) /* (N25) OSPI0_D2 */ >> + J722S_IOPAD(0x0018, PIN_INPUT, 0) /* (M24) OSPI0_D3 */ >> + J722S_IOPAD(0x001c, PIN_INPUT, 0) /* (N21) OSPI0_D4 */ >> + J722S_IOPAD(0x0020, PIN_INPUT, 0) /* (N22) OSPI0_D5 */ >> + J722S_IOPAD(0x0024, PIN_INPUT, 0) /* (P21) OSPI0_D6 */ >> + J722S_IOPAD(0x0028, PIN_INPUT, 0) /* (N20) OSPI0_D7 */ >> + J722S_IOPAD(0x0008, PIN_INPUT, 0) /* (P22) OSPI0_DQS */ > > > Could you check, Pin name in comments > > For example, Schematic says L22 is for OSPI0_DQS , but comments says P22 > > However offsets are good . Thanks for the review, I will fix this in the next revision. > >> + >; >> + bootph-all; >> + }; >> + >> rgmii1_pins_default: rgmii1-default-pins { >> pinctrl-single,pins = < >> J722S_IOPAD(0x014c, PIN_INPUT, 0) /* (AC25) RGMII1_RD0 */ >> @@ -290,6 +307,68 @@ exp1: gpio@23 { >> }; >> }; >> +&ospi0 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&ospi0_pins_default>; >> + status = "okay"; >> + >> + flash@0 { >> + compatible = "jedec,spi-nor"; >> + reg = <0x0>; >> + spi-tx-bus-width = <8>; >> + spi-rx-bus-width = <8>; >> + spi-max-frequency = <25000000>; >> + cdns,tshsl-ns = <60>; >> + cdns,tsd2d-ns = <60>; >> + cdns,tchsh-ns = <60>; >> + cdns,tslch-ns = <60>; >> + cdns,read-delay = <4>; >> + bootph-all; >> + >> + partitions { >> + compatible = "fixed-partitions"; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + >> + partition@0 { >> + label = "ospi.tiboot3"; >> + reg = <0x00 0x80000>; >> + }; > > > I suggest to keep 1MB to accommodate future size increase > For J722S, the maximum loadable SPL size is 0x7e000, images larger than these cannot be loaded by ROM, increasing the size here will not give any benefit, planning to keep as-is if there are no objections. Thanks and Regards, Vaishnav >> + >> + partition@80000 { >> + label = "ospi.tispl"; >> + reg = <0x80000 0x200000>; >> + }; >> + >> + partition@280000 { >> + label = "ospi.u-boot"; >> + reg = <0x280000 0x400000>; >> + }; >> + >> + partition@680000 { >> + label = "ospi.env"; >> + reg = <0x680000 0x40000>; >> + }; >> + >> + partition@6c0000 { >> + label = "ospi.env.backup"; >> + reg = <0x6c0000 0x40000>; >> + }; >> + >> + partition@800000 { >> + label = "ospi.rootfs"; >> + reg = <0x800000 0x37c0000>; >> + }; >> + >> + partition@3fc0000 { >> + label = "ospi.phypattern"; >> + reg = <0x3fc0000 0x40000>; >> + }; >> + }; >> + }; >> + >> +}; >> + >> &sdhci1 { >> /* SD/MMC */ >> vmmc-supply = <&vdd_mmc1>; ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH 2/2] arm64: dts: ti: k3-j722s-evm: Enable OSPI NOR support 2024-02-19 8:23 ` Vaishnav Achath @ 2024-02-19 8:45 ` Kumar, Udit 0 siblings, 0 replies; 6+ messages in thread From: Kumar, Udit @ 2024-02-19 8:45 UTC (permalink / raw) To: Vaishnav Achath, nm, vigneshr, kristo, robh, krzysztof.kozlowski+dt, conor+dt Cc: linux-arm-kernel, devicetree, linux-kernel, s-vadapalli Hi Vaishnav On 2/19/2024 1:53 PM, Vaishnav Achath wrote: > Hi Udit, > > On 19/02/24 11:25, Kumar, Udit wrote: >> Hi Vaishnav >> >> On 2/16/2024 7:25 PM, Vaishnav Achath wrote: >>> J722S EVM has S28HS512T 64 MiB Octal SPI NOR flash connected >>> to the OSPI interface, add support for the flash and describe >>> the partition information as per bootloader. >>> >>> Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> >>> --- >>> arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 79 >>> +++++++++++++++++++++++++ >>> 1 file changed, 79 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts >>> b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts >>> index 9e12a6e9111f..b1c6499c0c9d 100644 >>> --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts >>> +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts >>> @@ -169,6 +169,23 @@ J722S_IOPAD(0x015c, PIN_INPUT, 0) /* (AD25) >>> MDIO0_MDIO */ >>> >; >>> }; >>> + ospi0_pins_default: ospi0-default-pins { >>> + pinctrl-single,pins = < >>> + J722S_IOPAD(0x0000, PIN_OUTPUT, 0) /* (P23) OSPI0_CLK */ >>> + J722S_IOPAD(0x002c, PIN_OUTPUT, 0) /* (M25) OSPI0_CSn0 */ >>> + J722S_IOPAD(0x000c, PIN_INPUT, 0) /* (L25) OSPI0_D0 */ >>> + J722S_IOPAD(0x0010, PIN_INPUT, 0) /* (N24) OSPI0_D1 */ >>> + J722S_IOPAD(0x0014, PIN_INPUT, 0) /* (N25) OSPI0_D2 */ >>> + J722S_IOPAD(0x0018, PIN_INPUT, 0) /* (M24) OSPI0_D3 */ >>> + J722S_IOPAD(0x001c, PIN_INPUT, 0) /* (N21) OSPI0_D4 */ >>> + J722S_IOPAD(0x0020, PIN_INPUT, 0) /* (N22) OSPI0_D5 */ >>> + J722S_IOPAD(0x0024, PIN_INPUT, 0) /* (P21) OSPI0_D6 */ >>> + J722S_IOPAD(0x0028, PIN_INPUT, 0) /* (N20) OSPI0_D7 */ >>> + J722S_IOPAD(0x0008, PIN_INPUT, 0) /* (P22) OSPI0_DQS */ >> >> >> Could you check, Pin name in comments >> >> For example, Schematic says L22 is for OSPI0_DQS , but comments says P22 >> >> However offsets are good . > > Thanks for the review, I will fix this in the next revision. > >> >>> + >; >>> + bootph-all; >>> + }; >>> + >>> rgmii1_pins_default: rgmii1-default-pins { >>> pinctrl-single,pins = < >>> J722S_IOPAD(0x014c, PIN_INPUT, 0) /* (AC25) RGMII1_RD0 */ >>> @@ -290,6 +307,68 @@ exp1: gpio@23 { >>> }; >>> }; >>> +&ospi0 { >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&ospi0_pins_default>; >>> + status = "okay"; >>> + >>> + flash@0 { >>> + compatible = "jedec,spi-nor"; >>> + reg = <0x0>; >>> + spi-tx-bus-width = <8>; >>> + spi-rx-bus-width = <8>; >>> + spi-max-frequency = <25000000>; >>> + cdns,tshsl-ns = <60>; >>> + cdns,tsd2d-ns = <60>; >>> + cdns,tchsh-ns = <60>; >>> + cdns,tslch-ns = <60>; >>> + cdns,read-delay = <4>; >>> + bootph-all; >>> + >>> + partitions { >>> + compatible = "fixed-partitions"; >>> + #address-cells = <1>; >>> + #size-cells = <1>; >>> + >>> + partition@0 { >>> + label = "ospi.tiboot3"; >>> + reg = <0x00 0x80000>; >>> + }; >> >> >> I suggest to keep 1MB to accommodate future size increase >> > > For J722S, the maximum loadable SPL size is 0x7e000, images larger > than these cannot be loaded by ROM, increasing the size here will not > give any benefit, planning to keep as-is if there are no objections. > If ROM is limiting size here, then no need to increase this > Thanks and Regards, > Vaishnav > >>> + >>> + partition@80000 { >>> + label = "ospi.tispl"; >>> + reg = <0x80000 0x200000>; >>> + }; >>> + >>> + partition@280000 { >>> + label = "ospi.u-boot"; >>> + reg = <0x280000 0x400000>; >>> + }; >>> + >>> + partition@680000 { >>> + label = "ospi.env"; >>> + reg = <0x680000 0x40000>; >>> + }; >>> + >>> + partition@6c0000 { >>> + label = "ospi.env.backup"; >>> + reg = <0x6c0000 0x40000>; >>> + }; >>> + >>> + partition@800000 { >>> + label = "ospi.rootfs"; >>> + reg = <0x800000 0x37c0000>; >>> + }; >>> + >>> + partition@3fc0000 { >>> + label = "ospi.phypattern"; >>> + reg = <0x3fc0000 0x40000>; >>> + }; >>> + }; >>> + }; >>> + >>> +}; >>> + >>> &sdhci1 { >>> /* SD/MMC */ >>> vmmc-supply = <&vdd_mmc1>; ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2024-02-19 8:45 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2024-02-16 13:55 [PATCH 0/2] Add OSPI and Ethernet support on J722S EVM Vaishnav Achath 2024-02-16 13:55 ` [PATCH 1/2] arm64: dts: ti: k3-j722s-evm: Enable CPSW3G RGMII1 Vaishnav Achath 2024-02-16 13:55 ` [PATCH 2/2] arm64: dts: ti: k3-j722s-evm: Enable OSPI NOR support Vaishnav Achath 2024-02-19 5:55 ` Kumar, Udit 2024-02-19 8:23 ` Vaishnav Achath 2024-02-19 8:45 ` Kumar, Udit
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