From: Ravi Bangoria <ravi.bangoria@amd.com>
To: <seanjc@google.com>, <pbonzini@redhat.com>, <nikunj.dadhania@amd.com>
Cc: <ravi.bangoria@amd.com>, <thomas.lendacky@amd.com>,
<tglx@linutronix.de>, <mingo@redhat.com>, <bp@alien8.de>,
<dave.hansen@linux.intel.com>, <x86@kernel.org>, <hpa@zytor.com>,
<michael.roth@amd.com>, <pankaj.gupta@amd.com>,
<kvm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<santosh.shukla@amd.com>
Subject: [PATCH v3 1/3] KVM: SEV-ES: Prevent MSR access post VMSA encryption
Date: Thu, 23 May 2024 12:18:26 +0000 [thread overview]
Message-ID: <20240523121828.808-2-ravi.bangoria@amd.com> (raw)
In-Reply-To: <20240523121828.808-1-ravi.bangoria@amd.com>
From: Nikunj A Dadhania <nikunj@amd.com>
KVM currently allows userspace to read/write MSRs even after the VMSA is
encrypted. This can cause unintentional issues if MSR access has side-
effects. For ex, while migrating a guest, userspace could attempt to
migrate MSR_IA32_DEBUGCTLMSR and end up unintentionally disabling LBRV on
the target. Fix this by preventing access to those MSRs which are context
switched via the VMSA, once the VMSA is encrypted.
Suggested-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com>
---
arch/x86/kvm/svm/svm.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index 3d0549ca246f..489b0183f37d 100644
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -2834,10 +2834,24 @@ static int svm_get_msr_feature(struct kvm_msr_entry *msr)
return 0;
}
+static bool
+sev_es_prevent_msr_access(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
+{
+ return sev_es_guest(vcpu->kvm) &&
+ vcpu->arch.guest_state_protected &&
+ svm_msrpm_offset(msr_info->index) != MSR_INVALID &&
+ !msr_write_intercepted(vcpu, msr_info->index);
+}
+
static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
{
struct vcpu_svm *svm = to_svm(vcpu);
+ if (sev_es_prevent_msr_access(vcpu, msr_info)) {
+ msr_info->data = 0;
+ return 0;
+ }
+
switch (msr_info->index) {
case MSR_AMD64_TSC_RATIO:
if (!msr_info->host_initiated &&
@@ -2988,6 +3002,10 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
u32 ecx = msr->index;
u64 data = msr->data;
+
+ if (sev_es_prevent_msr_access(vcpu, msr))
+ return 0;
+
switch (ecx) {
case MSR_AMD64_TSC_RATIO:
--
2.45.1
next prev parent reply other threads:[~2024-05-23 12:19 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-23 12:18 [PATCH v3 0/3] KVM: SEV-ES: Fix KVM_{GET|SET}_MSRS and LBRV handling Ravi Bangoria
2024-05-23 12:18 ` Ravi Bangoria [this message]
2024-05-28 16:31 ` [PATCH v3 1/3] KVM: SEV-ES: Prevent MSR access post VMSA encryption Paolo Bonzini
2024-05-29 10:44 ` Ravi Bangoria
2024-06-04 23:10 ` Michael Roth
2024-05-23 12:18 ` [PATCH v3 2/3] KVM: SEV-ES: Disallow SEV-ES guests when X86_FEATURE_LBRV is absent Ravi Bangoria
2024-05-28 16:33 ` Paolo Bonzini
2024-05-29 10:43 ` Ravi Bangoria
2024-05-23 12:18 ` [PATCH v3 3/3] KVM: SEV-ES: Fix LBRV code Ravi Bangoria
2024-05-30 14:03 ` Tom Lendacky
2024-05-31 4:06 ` Ravi Bangoria
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