From: Tero Kristo <tero.kristo@linux.intel.com>
To: srinivas.pandruvada@linux.intel.com,
ilpo.jarvinen@linux.intel.com, hdegoede@redhat.com
Cc: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org
Subject: [PATCH 0/6] Intel Performance Limit Reasons support
Date: Mon, 27 May 2024 16:29:32 +0300 [thread overview]
Message-ID: <20240527133400.483634-1-tero.kristo@linux.intel.com> (raw)
Hello,
This series adds support for the Intel PLR (Performance Limit Reasons).
PLR provides status information for Intel HW performance events,
exported via debugfs within the existing TPMI hierarchy. The status bits
are sticky, and they can be cleared by writing "0" to the corresponding
debugfs files.
-Tero
next reply other threads:[~2024-05-27 13:34 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-27 13:29 Tero Kristo [this message]
2024-05-27 13:29 ` [PATCH 1/6] platform/x86/intel/tpmi: Add support for performance limit reasons Tero Kristo
2024-05-27 13:29 ` [PATCH 2/6] platform/x86/intel/tpmi: Add API to get debugfs root Tero Kristo
2024-05-27 13:29 ` [PATCH 3/6] platform/x86/intel: TPMI domain id and CPU mapping Tero Kristo
2024-05-27 21:33 ` srinivas pandruvada
2024-05-28 7:34 ` [PATCH v2 " Tero Kristo
2024-05-31 13:45 ` Ilpo Järvinen
2024-05-31 16:47 ` Tero Kristo
2024-05-27 13:29 ` [PATCH 4/6] platform/x86/intel/tpmi: Add new auxiliary driver for performance limits Tero Kristo
2024-05-27 13:29 ` [PATCH 5/6] platform/x86/intel/tpmi/plr: Add support for the plr mailbox Tero Kristo
2024-05-27 13:29 ` [PATCH 6/6] doc: TPMI: Add entry for Performance Limit Reasons Tero Kristo
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