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From: Tero Kristo <tero.kristo@linux.intel.com>
To: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
Cc: srinivas.pandruvada@linux.intel.com,
	Hans de Goede <hdegoede@redhat.com>,
	 platform-driver-x86@vger.kernel.org,
	LKML <linux-kernel@vger.kernel.org>,
	 Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Subject: Re: [PATCH v2 3/6] platform/x86/intel: TPMI domain id and CPU mapping
Date: Fri, 31 May 2024 19:47:08 +0300	[thread overview]
Message-ID: <e2ff917300939bb017b8f587a66a93022f3d1eeb.camel@linux.intel.com> (raw)
In-Reply-To: <e56885a4-3344-b9f9-92d5-33c9af00636d@linux.intel.com>

On Fri, 2024-05-31 at 16:45 +0300, Ilpo Järvinen wrote:
> On Tue, 28 May 2024, Tero Kristo wrote:
> 
> > From: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
> > 
> > Each TPMI power domain includes a group of CPUs. Several power
> > management settings in this case applicable to a group of CPUs.
> > There can be several power domains in a CPU package. So, provide
> > interfaces for:
> > - Get power domain id for a Linux CPU
> > - Get mask of Linux CPUs in a power domain
> > 
> > Hardware Punit uses different CPU numbering, which is not based on
> > APIC (Advanced Programmable Interrupt Controller) CPU numbering.
> > The Linux CPU numbering is based on APIC CPU numbering. Some PM
> > features
> > like Intel Speed Select, the CPU core mask provided by the hardware
> > is
> > based on the Punit CPU numbering. To use the core mask, this mask
> > needs to be converted to a Linux CPUs mask. So, provide interfaces
> > for:
> > - Convert to a Linux CPU number from a Punit CPU number
> > - Convert to a Punit CPU number from a Linux CPU number
> > 
> > On each CPU online, MSR 0x54 is used to read the mapping and stores
> > in
> > a per cpu array. Create a hash for faster searching of a Linux CPU
> > number
> > from a Punit CPU number.
> > 
> > Signed-off-by: Srinivas Pandruvada
> > <srinivas.pandruvada@linux.intel.com>
> > [tero.kristo: minor updates]
> > Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
> > Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
> > Signed-off-by: Tero Kristo <tero.kristo@linux.intel.com>
> > ---
> > v2:
> >   * changed to use X86_MATCH_VFM() instead of
> > X86_MATCH_INTEL_FAM6_MODEL()
> 
> I've applied this v2 + the other patches from v1 series now to
> review-ilpo 
> branch.
> 
> For the record, I removed "All rights reserved." lines from the
> patches 
> while applying. I asking first (privately) a permission from Tero
> whether 
> it's okay with him I remove those lines.
> 

Thanks Ilpo!

-Tero

  reply	other threads:[~2024-05-31 16:47 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-27 13:29 [PATCH 0/6] Intel Performance Limit Reasons support Tero Kristo
2024-05-27 13:29 ` [PATCH 1/6] platform/x86/intel/tpmi: Add support for performance limit reasons Tero Kristo
2024-05-27 13:29 ` [PATCH 2/6] platform/x86/intel/tpmi: Add API to get debugfs root Tero Kristo
2024-05-27 13:29 ` [PATCH 3/6] platform/x86/intel: TPMI domain id and CPU mapping Tero Kristo
2024-05-27 21:33   ` srinivas pandruvada
2024-05-28  7:34     ` [PATCH v2 " Tero Kristo
2024-05-31 13:45       ` Ilpo Järvinen
2024-05-31 16:47         ` Tero Kristo [this message]
2024-05-27 13:29 ` [PATCH 4/6] platform/x86/intel/tpmi: Add new auxiliary driver for performance limits Tero Kristo
2024-05-27 13:29 ` [PATCH 5/6] platform/x86/intel/tpmi/plr: Add support for the plr mailbox Tero Kristo
2024-05-27 13:29 ` [PATCH 6/6] doc: TPMI: Add entry for Performance Limit Reasons Tero Kristo

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