From: Hsiao Chien Sung via B4 Relay <devnull+shawn.sung.mediatek.com@kernel.org>
To: Chun-Kuang Hu <chunkuang.hu@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
David Airlie <airlied@gmail.com>,
Daniel Vetter <daniel@ffwll.ch>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
CK Hu <ck.hu@mediatek.com>,
Bibby Hsieh <bibby.hsieh@mediatek.com>,
Daniel Kurtz <djkurtz@chromium.org>,
YT Shen <yt.shen@mediatek.com>,
Mao Huang <littlecvr@chromium.org>,
"Nancy.Lin" <nancy.lin@mediatek.com>
Cc: dri-devel@lists.freedesktop.org,
linux-mediatek@lists.infradead.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Hsiao Chien Sung <shawn.sung@mediatek.com>
Subject: [PATCH v2 04/14] drm/mediatek: Fix XRGB setting error in Mixer
Date: Wed, 19 Jun 2024 22:30:45 +0800 [thread overview]
Message-ID: <20240619-mediatek-drm-next-v2-4-abf68f46f8d2@mediatek.com> (raw)
In-Reply-To: <20240619-mediatek-drm-next-v2-0-abf68f46f8d2@mediatek.com>
From: Hsiao Chien Sung <shawn.sung@mediatek.com>
Although the alpha channel in XRGB formats can be ignored, ALPHA_CON
must be configured accordingly when using XRGB formats or it will still
affects CRC generation.
Fixes: d886c0009bd0 ("drm/mediatek: Add ETHDR support for MT8195")
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
---
drivers/gpu/drm/mediatek/mtk_ethdr.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_ethdr.c b/drivers/gpu/drm/mediatek/mtk_ethdr.c
index d7d16482c947..5c52e514ae30 100644
--- a/drivers/gpu/drm/mediatek/mtk_ethdr.c
+++ b/drivers/gpu/drm/mediatek/mtk_ethdr.c
@@ -153,6 +153,7 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx,
unsigned int offset = (pending->x & 1) << 31 | pending->y << 16 | pending->x;
unsigned int align_width = ALIGN_DOWN(pending->width, 2);
unsigned int alpha_con = 0;
+ bool replace_src_a = false;
dev_dbg(dev, "%s+ idx:%d", __func__, idx);
@@ -167,7 +168,15 @@ void mtk_ethdr_layer_config(struct device *dev, unsigned int idx,
if (state->base.fb && state->base.fb->format->has_alpha)
alpha_con = MIXER_ALPHA_AEN | MIXER_ALPHA;
- mtk_mmsys_mixer_in_config(priv->mmsys_dev, idx + 1, alpha_con ? false : true,
+ if (state->base.fb && !state->base.fb->format->has_alpha) {
+ /*
+ * Mixer doesn't support CONST_BLD mode,
+ * use a trick to make the output equivalent
+ */
+ replace_src_a = true;
+ }
+
+ mtk_mmsys_mixer_in_config(priv->mmsys_dev, idx + 1, replace_src_a,
MIXER_ALPHA,
pending->x & 1 ? MIXER_INX_MODE_EVEN_EXTEND :
MIXER_INX_MODE_BYPASS, align_width / 2 - 1, cmdq_pkt);
--
Git-146)
next prev parent reply other threads:[~2024-06-19 14:32 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-19 14:30 [PATCH v2 00/14] Fix the errors of MediaTek display driver found by IGT Hsiao Chien Sung via B4 Relay
2024-06-19 14:30 ` [PATCH v2 01/14] drm/mediatek: Add missing plane settings when async update Hsiao Chien Sung via B4 Relay
2024-06-19 14:30 ` [PATCH v2 02/14] drm/mediatek: Disable 9-bit alpha in ETHDR Hsiao Chien Sung via B4 Relay
2024-06-19 14:30 ` [PATCH v2 03/14] drm/mediatek: Fix XRGB setting error in OVL Hsiao Chien Sung via B4 Relay
2024-06-19 14:30 ` Hsiao Chien Sung via B4 Relay [this message]
2024-06-19 14:30 ` [PATCH v2 05/14] drm/mediatek: Turn off the layers with zero width or height Hsiao Chien Sung via B4 Relay
2024-06-19 14:30 ` [PATCH v2 06/14] drm/mediatek: Add OVL compatible name for MT8195 Hsiao Chien Sung via B4 Relay
2024-06-19 14:30 ` [PATCH v2 07/14] drm/mediatek: Add DRM_MODE_ROTATE_0 to rotation property Hsiao Chien Sung via B4 Relay
2024-06-19 14:30 ` [PATCH v2 08/14] drm/mediatek: Add new color format MACROs in OVL Hsiao Chien Sung via B4 Relay
2024-06-19 14:30 ` [PATCH v2 09/14] drm/mediatek: Set DRM mode configs accordingly Hsiao Chien Sung via B4 Relay
2024-06-19 14:30 ` [PATCH v2 10/14] drm/mediatek: Support more 10bit formats in OVL Hsiao Chien Sung via B4 Relay
2024-06-19 14:30 ` [PATCH v2 11/14] drm/mediatek: Support RGBA8888 and RGBX8888 in OVL on MT8195 Hsiao Chien Sung via B4 Relay
2024-06-19 14:30 ` [PATCH v2 12/14] drm/mediatek: Support DRM plane alpha in OVL Hsiao Chien Sung via B4 Relay
2024-06-19 14:30 ` [PATCH v2 13/14] drm/mediatek: Support DRM plane alpha in Mixer Hsiao Chien Sung via B4 Relay
2024-06-19 14:30 ` [PATCH v2 14/14] drm/mediatek: Fix XRGB setting error in OVL Hsiao Chien Sung via B4 Relay
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