[PATCH] misc: mrvl-cn10k-dpi: resolve compilation issues on 32-bit ARM

[Vamsi Attunuru <vattunuru@marvell.com>]

Upon adding CONFIG_ARCH_THUNDER & CONFIG_COMPILE_TEST dependency,
compilation errors arise on 32-bit ARM with writeq() & readq() calls
which are used for accessing 64-bit values.

Patch utilizes CONFIG_64BIT checks to define appropriate calls
for accessing 64-bit values.

Fixes: a5e43e2d202d ("misc: Kconfig: add a new dependency for MARVELL_CN10K_DPI")
Signed-off-by: Vamsi Attunuru <vattunuru@marvell.com>
---
 drivers/misc/mrvl_cn10k_dpi.c | 47 ++++++++++++++++++++++++++++++++---
 1 file changed, 43 insertions(+), 4 deletions(-)

diff --git a/drivers/misc/mrvl_cn10k_dpi.c b/drivers/misc/mrvl_cn10k_dpi.c
index 7d5433121ff6..8d24dd6b421b 100644
--- a/drivers/misc/mrvl_cn10k_dpi.c
+++ b/drivers/misc/mrvl_cn10k_dpi.c
@@ -13,6 +13,9 @@
 #include <linux/pci.h>
 #include <linux/irq.h>
 #include <linux/interrupt.h>
+#ifndef CONFIG_64BIT
+#include <linux/io-64-nonatomic-lo-hi.h>
+#endif
 
 #include <uapi/misc/mrvl_cn10k_dpi.h>
 
@@ -185,6 +188,8 @@ struct dpi_mbox_message {
 	uint64_t word_h;
 };
 
+#ifdef CONFIG_64BIT
+
 static inline void dpi_reg_write(struct dpipf *dpi, u64 offset, u64 val)
 {
 	writeq(val, dpi->reg_base + offset);
@@ -195,6 +200,40 @@ static inline u64 dpi_reg_read(struct dpipf *dpi, u64 offset)
 	return readq(dpi->reg_base + offset);
 }
 
+static inline void dpi_writeq(u64 val, void __iomem *addr)
+{
+	writeq(val, addr);
+}
+
+static inline u64 dpi_readq(const void __iomem *addr)
+{
+	return readq(addr);
+}
+
+#else
+
+static inline void dpi_reg_write(struct dpipf *dpi, u64 offset, u64 val)
+{
+	lo_hi_writeq(val, dpi->reg_base + offset);
+}
+
+static inline u64 dpi_reg_read(struct dpipf *dpi, u64 offset)
+{
+	return lo_hi_readq(dpi->reg_base + offset);
+}
+
+static inline void dpi_writeq(u64 val, void __iomem *addr)
+{
+	lo_hi_writeq(val, addr);
+}
+
+static inline u64 dpi_readq(const void __iomem *addr)
+{
+	return lo_hi_readq(addr);
+}
+
+#endif
+
 static void dpi_wqe_cs_offset(struct dpipf *dpi, u8 offset)
 {
 	u64 reg;
@@ -324,7 +363,7 @@ static void dpi_pfvf_mbox_work(struct work_struct *work)
 	memset(&msg, 0, sizeof(msg));
 
 	mutex_lock(&mbox->lock);
-	msg.word_l = readq(mbox->vf_pf_data_reg);
+	msg.word_l = dpi_readq(mbox->vf_pf_data_reg);
 	if (msg.word_l == (u64)-1)
 		goto exit;
 
@@ -333,13 +372,13 @@ static void dpi_pfvf_mbox_work(struct work_struct *work)
 		goto exit;
 
 	dpivf = &dpi->vf[vfid];
-	msg.word_h = readq(mbox->pf_vf_data_reg);
+	msg.word_h = dpi_readq(mbox->pf_vf_data_reg);
 
 	ret = queue_config(dpi, dpivf, &msg);
 	if (ret < 0)
-		writeq(DPI_MBOX_TYPE_RSP_NACK, mbox->pf_vf_data_reg);
+		dpi_writeq(DPI_MBOX_TYPE_RSP_NACK, mbox->pf_vf_data_reg);
 	else
-		writeq(DPI_MBOX_TYPE_RSP_ACK, mbox->pf_vf_data_reg);
+		dpi_writeq(DPI_MBOX_TYPE_RSP_ACK, mbox->pf_vf_data_reg);
 exit:
 	mutex_unlock(&mbox->lock);
 }
-- 
2.25.1