* [PATCH 0/2] arm64: dts: ti: k3-am62{a,p}x-sk: add opp frequencies
@ 2024-08-09 22:01 Bryan Brattlof
2024-08-09 22:01 ` [PATCH 1/2] arm64: dts: ti: k3-am62a: " Bryan Brattlof
2024-08-09 22:01 ` [PATCH 2/2] arm64: dts: ti: k3-am62p: " Bryan Brattlof
0 siblings, 2 replies; 4+ messages in thread
From: Bryan Brattlof @ 2024-08-09 22:01 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Bryan Brattlof
Hello everyone
This small series add the opp frequencies for the Cortex-A53s on the
am62px-sk and am62ax-sk reference boards allowing them to slow down when
idle and save some power at runtime.
Happy reviewing
~Bryan
Signed-off-by: Bryan Brattlof <bb@ti.com>
---
Bryan Brattlof (2):
arm64: dts: ti: k3-am62a: add opp frequencies
arm64: dts: ti: k3-am62p: add opp frequencies
arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 5 +++
arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 9 ++++
arch/arm64/boot/dts/ti/k3-am62a7.dtsi | 51 ++++++++++++++++++++++
.../boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi | 5 +++
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 9 ++++
arch/arm64/boot/dts/ti/k3-am62p5.dtsi | 47 ++++++++++++++++++++
6 files changed, 126 insertions(+)
---
base-commit: e3cce1229c34b5c28f103361c4d6b3ef17302d5d
change-id: 20240809-opp-7f1372af677c
Best regards,
--
Bryan Brattlof <bb@ti.com>
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH 1/2] arm64: dts: ti: k3-am62a: add opp frequencies
2024-08-09 22:01 [PATCH 0/2] arm64: dts: ti: k3-am62{a,p}x-sk: add opp frequencies Bryan Brattlof
@ 2024-08-09 22:01 ` Bryan Brattlof
2024-08-09 22:01 ` [PATCH 2/2] arm64: dts: ti: k3-am62p: " Bryan Brattlof
1 sibling, 0 replies; 4+ messages in thread
From: Bryan Brattlof @ 2024-08-09 22:01 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Bryan Brattlof
Add OPP table for the am62ax-sk allowing us to slow down CPUs when idle
Signed-off-by: Bryan Brattlof <bb@ti.com>
---
arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi | 5 +++
arch/arm64/boot/dts/ti/k3-am62a7-sk.dts | 9 +++++
arch/arm64/boot/dts/ti/k3-am62a7.dtsi | 51 +++++++++++++++++++++++++++++
3 files changed, 65 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
index f5ac101a04dfa..0b1dd5390cd3f 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a-wakeup.dtsi
@@ -17,6 +17,11 @@ chipid: chipid@14 {
reg = <0x14 0x4>;
};
+ opp_efuse_table: syscon@18 {
+ compatible = "ti,am62-opp-efuse-table", "syscon";
+ reg = <0x18 0x4>;
+ };
+
cpsw_mac_syscon: ethernet-mac-syscon@200 {
compatible = "ti,am62p-cpsw-mac-efuse", "syscon";
reg = <0x200 0x8>;
diff --git a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
index 67faf46d7a35a..a6f0d87a50d8a 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62a7-sk.dts
@@ -68,6 +68,15 @@ wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 {
};
};
+ opp-table {
+ /* Requires VDD_CORE at 0v85 */
+ opp-1400000000 {
+ opp-hz = /bits/ 64 <1400000000>;
+ opp-supported-hw = <0x01 0x0004>;
+ clock-latency-ns = <6000000>;
+ };
+ };
+
vmain_pd: regulator-0 {
/* TPS25750 PD CONTROLLER OUTPUT */
compatible = "regulator-fixed";
diff --git a/arch/arm64/boot/dts/ti/k3-am62a7.dtsi b/arch/arm64/boot/dts/ti/k3-am62a7.dtsi
index f86a23404e6dd..6c99221beb6bd 100644
--- a/arch/arm64/boot/dts/ti/k3-am62a7.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62a7.dtsi
@@ -48,6 +48,8 @@ cpu0: cpu@0 {
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&L2_0>;
+ operating-points-v2 = <&a53_opp_table>;
+ clocks = <&k3_clks 135 0>;
};
cpu1: cpu@1 {
@@ -62,6 +64,8 @@ cpu1: cpu@1 {
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&L2_0>;
+ operating-points-v2 = <&a53_opp_table>;
+ clocks = <&k3_clks 136 0>;
};
cpu2: cpu@2 {
@@ -76,6 +80,8 @@ cpu2: cpu@2 {
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&L2_0>;
+ operating-points-v2 = <&a53_opp_table>;
+ clocks = <&k3_clks 137 0>;
};
cpu3: cpu@3 {
@@ -90,6 +96,51 @@ cpu3: cpu@3 {
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&L2_0>;
+ operating-points-v2 = <&a53_opp_table>;
+ clocks = <&k3_clks 138 0>;
+ };
+ };
+
+ a53_opp_table: opp-table {
+ compatible = "operating-points-v2-ti-cpu";
+ opp-shared;
+ syscon = <&opp_efuse_table>;
+
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-supported-hw = <0x01 0x0007>;
+ clock-latency-ns = <6000000>;
+ };
+
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-supported-hw = <0x01 0x0007>;
+ clock-latency-ns = <6000000>;
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-supported-hw = <0x01 0x0007>;
+ clock-latency-ns = <6000000>;
+ };
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-supported-hw = <0x01 0x0007>;
+ clock-latency-ns = <6000000>;
+ };
+
+ opp-1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-supported-hw = <0x01 0x0006>;
+ clock-latency-ns = <6000000>;
+ };
+
+ opp-1250000000 {
+ opp-hz = /bits/ 64 <1250000000>;
+ opp-supported-hw = <0x01 0x0004>;
+ clock-latency-ns = <6000000>;
+ opp-suspend;
};
};
--
2.45.2
^ permalink raw reply [flat|nested] 4+ messages in thread* [PATCH 2/2] arm64: dts: ti: k3-am62p: add opp frequencies
2024-08-09 22:01 [PATCH 0/2] arm64: dts: ti: k3-am62{a,p}x-sk: add opp frequencies Bryan Brattlof
2024-08-09 22:01 ` [PATCH 1/2] arm64: dts: ti: k3-am62a: " Bryan Brattlof
@ 2024-08-09 22:01 ` Bryan Brattlof
2024-08-12 11:41 ` Nishanth Menon
1 sibling, 1 reply; 4+ messages in thread
From: Bryan Brattlof @ 2024-08-09 22:01 UTC (permalink / raw)
To: Nishanth Menon, Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-kernel, devicetree, linux-kernel, Bryan Brattlof
Add OPP table for the am62px-sk allowing us to slow down CPUs when idle
Signed-off-by: Bryan Brattlof <bb@ti.com>
---
.../boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi | 5 +++
arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 9 +++++
arch/arm64/boot/dts/ti/k3-am62p5.dtsi | 47 ++++++++++++++++++++++
3 files changed, 61 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi
index 315d0092e7366..6f32135f00a55 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi
@@ -20,6 +20,11 @@ chipid: chipid@14 {
bootph-all;
};
+ opp_efuse_table: syscon@18 {
+ compatible = "ti,am62-opp-efuse-table", "syscon";
+ reg = <0x18 0x4>;
+ };
+
cpsw_mac_syscon: ethernet-mac-syscon@200 {
compatible = "ti,am62p-cpsw-mac-efuse", "syscon";
reg = <0x200 0x8>;
diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
index ff65955551a32..ab5d7a5fc6118 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
@@ -128,6 +128,15 @@ led-0 {
};
};
+ opp-table {
+ /* Requires VDD_CORE at 0v85 */
+ opp-1400000000 {
+ opp-hz = /bits/ 64 <1400000000>;
+ opp-supported-hw = <0x01 0x0004>;
+ clock-latency-ns = <6000000>;
+ };
+ };
+
tlv320_mclk: clk-0 {
#clock-cells = <0>;
compatible = "fixed-clock";
diff --git a/arch/arm64/boot/dts/ti/k3-am62p5.dtsi b/arch/arm64/boot/dts/ti/k3-am62p5.dtsi
index 41f479dca4555..140587d02e88e 100644
--- a/arch/arm64/boot/dts/ti/k3-am62p5.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62p5.dtsi
@@ -47,6 +47,7 @@ cpu0: cpu@0 {
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&l2_0>;
+ operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 135 0>;
};
@@ -62,6 +63,7 @@ cpu1: cpu@1 {
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&l2_0>;
+ operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 136 0>;
};
@@ -77,6 +79,7 @@ cpu2: cpu@2 {
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&l2_0>;
+ operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 137 0>;
};
@@ -92,10 +95,54 @@ cpu3: cpu@3 {
d-cache-line-size = <64>;
d-cache-sets = <128>;
next-level-cache = <&l2_0>;
+ operating-points-v2 = <&a53_opp_table>;
clocks = <&k3_clks 138 0>;
};
};
+ a53_opp_table: opp-table {
+ compatible = "operating-points-v2-ti-cpu";
+ opp-shared;
+ syscon = <&opp_efuse_table>;
+
+ opp-200000000 {
+ opp-hz = /bits/ 64 <200000000>;
+ opp-supported-hw = <0x01 0x0007>;
+ clock-latency-ns = <6000000>;
+ };
+
+ opp-400000000 {
+ opp-hz = /bits/ 64 <400000000>;
+ opp-supported-hw = <0x01 0x0007>;
+ clock-latency-ns = <6000000>;
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-supported-hw = <0x01 0x0007>;
+ clock-latency-ns = <6000000>;
+ };
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-supported-hw = <0x01 0x0007>;
+ clock-latency-ns = <6000000>;
+ };
+
+ opp-1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-supported-hw = <0x01 0x0006>;
+ clock-latency-ns = <6000000>;
+ };
+
+ opp-1250000000 {
+ opp-hz = /bits/ 64 <1250000000>;
+ opp-supported-hw = <0x01 0x0004>;
+ clock-latency-ns = <6000000>;
+ opp-suspend;
+ };
+ };
+
l2_0: l2-cache0 {
compatible = "cache";
cache-unified;
--
2.45.2
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH 2/2] arm64: dts: ti: k3-am62p: add opp frequencies
2024-08-09 22:01 ` [PATCH 2/2] arm64: dts: ti: k3-am62p: " Bryan Brattlof
@ 2024-08-12 11:41 ` Nishanth Menon
0 siblings, 0 replies; 4+ messages in thread
From: Nishanth Menon @ 2024-08-12 11:41 UTC (permalink / raw)
To: Bryan Brattlof
Cc: Vignesh Raghavendra, Tero Kristo, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, linux-arm-kernel, devicetree,
linux-kernel
On 17:01-20240809, Bryan Brattlof wrote:
> Add OPP table for the am62px-sk allowing us to slow down CPUs when idle
Please fix the commit message. This is a device tree hardware
description. what the OS does with the frequencies is upto the OS.
Please also add documentation that provides the following information.
>
> Signed-off-by: Bryan Brattlof <bb@ti.com>
> ---
> .../boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi | 5 +++
> arch/arm64/boot/dts/ti/k3-am62p5-sk.dts | 9 +++++
> arch/arm64/boot/dts/ti/k3-am62p5.dtsi | 47 ++++++++++++++++++++++
> 3 files changed, 61 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi
> index 315d0092e7366..6f32135f00a55 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-wakeup.dtsi
> @@ -20,6 +20,11 @@ chipid: chipid@14 {
> bootph-all;
> };
>
> + opp_efuse_table: syscon@18 {
> + compatible = "ti,am62-opp-efuse-table", "syscon";
> + reg = <0x18 0x4>;
> + };
> +
> cpsw_mac_syscon: ethernet-mac-syscon@200 {
> compatible = "ti,am62p-cpsw-mac-efuse", "syscon";
> reg = <0x200 0x8>;
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
> index ff65955551a32..ab5d7a5fc6118 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am62p5-sk.dts
> @@ -128,6 +128,15 @@ led-0 {
> };
> };
>
> + opp-table {
> + /* Requires VDD_CORE at 0v85 */
> + opp-1400000000 {
> + opp-hz = /bits/ 64 <1400000000>;
> + opp-supported-hw = <0x01 0x0004>;
> + clock-latency-ns = <6000000>;
> + };
> + };
> +
> tlv320_mclk: clk-0 {
> #clock-cells = <0>;
> compatible = "fixed-clock";
Please keep the board dts changes separate.
> diff --git a/arch/arm64/boot/dts/ti/k3-am62p5.dtsi b/arch/arm64/boot/dts/ti/k3-am62p5.dtsi
> index 41f479dca4555..140587d02e88e 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p5.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-am62p5.dtsi
> @@ -47,6 +47,7 @@ cpu0: cpu@0 {
> d-cache-line-size = <64>;
> d-cache-sets = <128>;
> next-level-cache = <&l2_0>;
> + operating-points-v2 = <&a53_opp_table>;
> clocks = <&k3_clks 135 0>;
> };
>
> @@ -62,6 +63,7 @@ cpu1: cpu@1 {
> d-cache-line-size = <64>;
> d-cache-sets = <128>;
> next-level-cache = <&l2_0>;
> + operating-points-v2 = <&a53_opp_table>;
> clocks = <&k3_clks 136 0>;
> };
>
> @@ -77,6 +79,7 @@ cpu2: cpu@2 {
> d-cache-line-size = <64>;
> d-cache-sets = <128>;
> next-level-cache = <&l2_0>;
> + operating-points-v2 = <&a53_opp_table>;
> clocks = <&k3_clks 137 0>;
> };
>
> @@ -92,10 +95,54 @@ cpu3: cpu@3 {
> d-cache-line-size = <64>;
> d-cache-sets = <128>;
> next-level-cache = <&l2_0>;
> + operating-points-v2 = <&a53_opp_table>;
> clocks = <&k3_clks 138 0>;
> };
> };
>
> + a53_opp_table: opp-table {
> + compatible = "operating-points-v2-ti-cpu";
> + opp-shared;
> + syscon = <&opp_efuse_table>;
> +
> + opp-200000000 {
> + opp-hz = /bits/ 64 <200000000>;
> + opp-supported-hw = <0x01 0x0007>;
> + clock-latency-ns = <6000000>;
> + };
> +
> + opp-400000000 {
> + opp-hz = /bits/ 64 <400000000>;
> + opp-supported-hw = <0x01 0x0007>;
> + clock-latency-ns = <6000000>;
> + };
> +
> + opp-600000000 {
> + opp-hz = /bits/ 64 <600000000>;
> + opp-supported-hw = <0x01 0x0007>;
> + clock-latency-ns = <6000000>;
> + };
> +
> + opp-800000000 {
> + opp-hz = /bits/ 64 <800000000>;
> + opp-supported-hw = <0x01 0x0007>;
> + clock-latency-ns = <6000000>;
> + };
> +
> + opp-1000000000 {
> + opp-hz = /bits/ 64 <1000000000>;
> + opp-supported-hw = <0x01 0x0006>;
> + clock-latency-ns = <6000000>;
> + };
> +
> + opp-1250000000 {
> + opp-hz = /bits/ 64 <1250000000>;
> + opp-supported-hw = <0x01 0x0004>;
> + clock-latency-ns = <6000000>;
> + opp-suspend;
> + };
> + };
> +
> l2_0: l2-cache0 {
> compatible = "cache";
> cache-unified;
>
> --
> 2.45.2
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2024-08-12 11:41 UTC | newest]
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2024-08-09 22:01 [PATCH 0/2] arm64: dts: ti: k3-am62{a,p}x-sk: add opp frequencies Bryan Brattlof
2024-08-09 22:01 ` [PATCH 1/2] arm64: dts: ti: k3-am62a: " Bryan Brattlof
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