From: AlvinZhou <alvinzhou.tw@gmail.com>
To: linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org,
linux-kernel@vger.kernel.org, tudor.ambarus@linaro.org,
pratyush@kernel.org, mwalle@kernel.org,
miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
broonie@kernel.org
Cc: chengminglin@mxic.com.tw, leoyu@mxic.com.tw,
AlvinZhou <alvinzhou@mxic.com.tw>
Subject: [PATCH v10 0/6] Add octal DTR support for Macronix flash
Date: Thu, 26 Sep 2024 22:19:50 +0800 [thread overview]
Message-ID: <20240926141956.2386374-1-alvinzhou.tw@gmail.com> (raw)
From: AlvinZhou <alvinzhou@mxic.com.tw>
Add method for Macronix Octal DTR Enable/Disable.
Merge Tudor's patch "Allow specifying the byte order in DTR mode"
v10:
* Further explanation on adding Macronix manufacturer ID in ID table.
* Correct some typos.
v9:
* Change the name of the configuration register 2 for Macronix Octal
flash.
* Fix the bit value in __pad of struct spi_mem_op.
* Use the local variable proto instead of nor->read_proto.
v8:
* Supplement missing S-o-b
* Remove function spi_nor_is_octal_dtr_swab16
* Split IDs by MX25 & MX66
* Add dump of capability in debugfs
* Add dump of parameters in debugfs
* Add dump of result for mtd-utils tests
* Add SNOR_ID(0xC2) in last of Macronix ID table
v7:
* Add dtr_swab16 judgement to enable/disable Macronix xSPI host
controller swap byte feature.
v6:
* Add byte swap support for spi-mxic.c
* Remove flash name in ID table.
v5:
* Remove manufacturer read id function.
* For increased readability, separate Flash IDs based on whether
it supports RWW feature.
v4:
* Add patch for adding manufacturer read id function.
remove patch "hook manufacturer by checking first byte id"
v3:
* Add patch for hook manufacturer by comparing ID 1st byte.
* Add patches for specifying the byte order in DTR mode by merging
Tudor's patch.
v2:
* Following exsiting rules to re-create Macronix specify Octal DTR
method.
* change signature to jaimeliao@mxic.com.tw
* Clear sector size information in flash INFO.
AlvinZhou (6):
mtd: spi-nor: add Octal DTR support for Macronix flash
spi: spi-mem: Allow specifying the byte order in Octal DTR mode
mtd: spi-nor: core: Allow specifying the byte order in Octal DTR mode
mtd: spi-nor: sfdp: Get the 8D-8D-8D byte order from BFPT
spi: mxic: Add support for swapping byte
mtd: spi-nor: add support for Macronix Octal flash
drivers/mtd/spi-nor/core.c | 4 ++
drivers/mtd/spi-nor/core.h | 1 +
drivers/mtd/spi-nor/macronix.c | 95 +++++++++++++++++++++++++++++++++-
drivers/mtd/spi-nor/sfdp.c | 4 ++
drivers/mtd/spi-nor/sfdp.h | 1 +
drivers/spi/spi-mem.c | 3 ++
drivers/spi/spi-mxic.c | 17 ++++--
include/linux/spi/spi-mem.h | 8 ++-
8 files changed, 127 insertions(+), 6 deletions(-)
--
2.25.1
next reply other threads:[~2024-09-26 14:25 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-26 14:19 AlvinZhou [this message]
2024-09-26 14:19 ` [PATCH v10 1/6] mtd: spi-nor: add Octal " AlvinZhou
2024-10-02 7:16 ` Tudor Ambarus
2024-10-04 9:05 ` Alvin Zhou
2024-10-04 9:58 ` Tudor Ambarus
2024-10-04 16:22 ` Alvin Zhou
2024-09-26 14:19 ` [PATCH v10 2/6] spi: spi-mem: Allow specifying the byte order in Octal DTR mode AlvinZhou
2024-09-26 14:19 ` [PATCH v10 3/6] mtd: spi-nor: core: " AlvinZhou
2024-10-02 7:21 ` Tudor Ambarus
2024-09-26 14:19 ` [PATCH v10 4/6] mtd: spi-nor: sfdp: Get the 8D-8D-8D byte order from BFPT AlvinZhou
2024-10-02 7:28 ` Tudor Ambarus
2024-09-26 14:19 ` [PATCH v10 5/6] spi: mxic: Add support for swapping byte AlvinZhou
2024-09-26 14:19 ` [PATCH v10 6/6] mtd: spi-nor: add support for Macronix Octal flash AlvinZhou
2024-10-02 7:45 ` Tudor Ambarus
2024-10-08 3:38 ` Alvin Zhou
2024-10-04 7:55 ` [PATCH v10 0/6] Add octal DTR support for Macronix flash Tudor Ambarus
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