From: Tudor Ambarus <tudor.ambarus@linaro.org>
To: AlvinZhou <alvinzhou.tw@gmail.com>,
linux-mtd@lists.infradead.org, linux-spi@vger.kernel.org,
linux-kernel@vger.kernel.org, pratyush@kernel.org,
mwalle@kernel.org, miquel.raynal@bootlin.com, richard@nod.at,
vigneshr@ti.com, broonie@kernel.org
Cc: chengminglin@mxic.com.tw, leoyu@mxic.com.tw,
AlvinZhou <alvinzhou@mxic.com.tw>,
JaimeLiao <jaimeliao@mxic.com.tw>
Subject: Re: [PATCH v10 4/6] mtd: spi-nor: sfdp: Get the 8D-8D-8D byte order from BFPT
Date: Wed, 2 Oct 2024 10:28:21 +0300 [thread overview]
Message-ID: <5ef0b8bc-9728-45d1-9566-3f780fb70ee2@linaro.org> (raw)
In-Reply-To: <20240926141956.2386374-5-alvinzhou.tw@gmail.com>
On 26.09.2024 17:19, AlvinZhou wrote:
> +#define BFPT_DWORD18_BYTE_ORDER_SWAPPED BIT(31) /* Byte sawp of 16-bit in 8D-8D-8D mode */
typo: sawp. I'll replace the comment with
/* Byte order swapped in 8D-8D-8D mode */
No need to resend.
next prev parent reply other threads:[~2024-10-02 7:28 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-26 14:19 [PATCH v10 0/6] Add octal DTR support for Macronix flash AlvinZhou
2024-09-26 14:19 ` [PATCH v10 1/6] mtd: spi-nor: add Octal " AlvinZhou
2024-10-02 7:16 ` Tudor Ambarus
2024-10-04 9:05 ` Alvin Zhou
2024-10-04 9:58 ` Tudor Ambarus
2024-10-04 16:22 ` Alvin Zhou
2024-09-26 14:19 ` [PATCH v10 2/6] spi: spi-mem: Allow specifying the byte order in Octal DTR mode AlvinZhou
2024-09-26 14:19 ` [PATCH v10 3/6] mtd: spi-nor: core: " AlvinZhou
2024-10-02 7:21 ` Tudor Ambarus
2024-09-26 14:19 ` [PATCH v10 4/6] mtd: spi-nor: sfdp: Get the 8D-8D-8D byte order from BFPT AlvinZhou
2024-10-02 7:28 ` Tudor Ambarus [this message]
2024-09-26 14:19 ` [PATCH v10 5/6] spi: mxic: Add support for swapping byte AlvinZhou
2024-09-26 14:19 ` [PATCH v10 6/6] mtd: spi-nor: add support for Macronix Octal flash AlvinZhou
2024-10-02 7:45 ` Tudor Ambarus
2024-10-08 3:38 ` Alvin Zhou
2024-10-04 7:55 ` [PATCH v10 0/6] Add octal DTR support for Macronix flash Tudor Ambarus
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