* Re: [PATCH] drm: atmel-hlcdc: fix atmel_xlcdc_plane_setup_scaler()
2024-10-14 9:49 [PATCH] drm: atmel-hlcdc: fix atmel_xlcdc_plane_setup_scaler() Manikandan Muralidharan
@ 2024-10-18 23:24 ` Dmitry Baryshkov
2024-10-21 7:56 ` Nicolas Ferre
2025-10-14 10:14 ` Manikandan.M
2 siblings, 0 replies; 5+ messages in thread
From: Dmitry Baryshkov @ 2024-10-18 23:24 UTC (permalink / raw)
To: Manikandan Muralidharan
Cc: sam, bbrezillon, maarten.lankhorst, mripard, tzimmermann,
airlied, simona, nicolas.ferre, alexandre.belloni,
claudiu.beznea, Hari.PrasathGE, durai.manickamkr, dri-devel,
linux-arm-kernel, linux-kernel, Cyrille Pitchen
On Mon, Oct 14, 2024 at 03:19:42PM +0530, Manikandan Muralidharan wrote:
> From: Cyrille Pitchen <cyrille.pitchen@microchip.com>
>
> On SoCs, like the SAM9X75, which embed the XLCDC ip, the registers that
> configure the unified scaling engine were not filled with proper values.
>
> Indeed, for YCbCr formats, the VXSCFACT bitfield of the HEOCFG25
> register and the HXSCFACT bitfield of the HEOCFG27 register were
> incorrect.
>
> For 4:2:0 formats, both vertical and horizontal factors for
> chroma chanels should be divided by 2 from the factors for the luma
> channel. Hence:
>
> HEOCFG24.VXSYFACT = VFACTOR
> HEOCFG25.VSXCFACT = VFACTOR / 2
> HEOCFG26.HXSYFACT = HFACTOR
> HEOCFG27.HXSCFACT = HFACTOR / 2
>
> However, for 4:2:2 formats, only the horizontal factor for chroma
> chanels should be divided by 2 from the factor for the luma channel;
> the vertical factor is the same for all the luma and chroma channels.
> Hence:
>
> HEOCFG24.VXSYFACT = VFACTOR
> HEOCFG25.VXSCFACT = VFACTOR
> HEOCFG26.HXSYFACT = HFACTOR
> HEOCFG27.HXSCFACT = HFACTOR / 2
>
> Fixes: d498771b0b83 ("drm: atmel_hlcdc: Add support for XLCDC using IP specific driver ops")
> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com>
> ---
> .../gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 27 ++++++++++++++++---
> 1 file changed, 24 insertions(+), 3 deletions(-)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] drm: atmel-hlcdc: fix atmel_xlcdc_plane_setup_scaler()
2024-10-14 9:49 [PATCH] drm: atmel-hlcdc: fix atmel_xlcdc_plane_setup_scaler() Manikandan Muralidharan
2024-10-18 23:24 ` Dmitry Baryshkov
@ 2024-10-21 7:56 ` Nicolas Ferre
2025-01-28 4:59 ` Manikandan.M
2025-10-14 10:14 ` Manikandan.M
2 siblings, 1 reply; 5+ messages in thread
From: Nicolas Ferre @ 2024-10-21 7:56 UTC (permalink / raw)
To: Manikandan Muralidharan, sam, bbrezillon, maarten.lankhorst,
mripard, tzimmermann, airlied, simona, alexandre.belloni,
claudiu.beznea, Hari.PrasathGE, durai.manickamkr, dri-devel,
linux-arm-kernel, linux-kernel
Cc: Cyrille Pitchen
On 14/10/2024 at 11:49, Manikandan Muralidharan wrote:
> From: Cyrille Pitchen <cyrille.pitchen@microchip.com>
>
> On SoCs, like the SAM9X75, which embed the XLCDC ip, the registers that
> configure the unified scaling engine were not filled with proper values.
>
> Indeed, for YCbCr formats, the VXSCFACT bitfield of the HEOCFG25
> register and the HXSCFACT bitfield of the HEOCFG27 register were
> incorrect.
>
> For 4:2:0 formats, both vertical and horizontal factors for
> chroma chanels should be divided by 2 from the factors for the luma
> channel. Hence:
>
> HEOCFG24.VXSYFACT = VFACTOR
> HEOCFG25.VSXCFACT = VFACTOR / 2
> HEOCFG26.HXSYFACT = HFACTOR
> HEOCFG27.HXSCFACT = HFACTOR / 2
>
> However, for 4:2:2 formats, only the horizontal factor for chroma
> chanels should be divided by 2 from the factor for the luma channel;
> the vertical factor is the same for all the luma and chroma channels.
> Hence:
>
> HEOCFG24.VXSYFACT = VFACTOR
> HEOCFG25.VXSCFACT = VFACTOR
> HEOCFG26.HXSYFACT = HFACTOR
> HEOCFG27.HXSCFACT = HFACTOR / 2
>
> Fixes: d498771b0b83 ("drm: atmel_hlcdc: Add support for XLCDC using IP specific driver ops")
> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com>
Thanks Mani and Cyrille:
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Best regards,
Nicolas
> ---
> .../gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 27 ++++++++++++++++---
> 1 file changed, 24 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> index 4bcaf2cd7672..41c7351ae811 100644
> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> @@ -365,13 +365,34 @@ void atmel_xlcdc_plane_setup_scaler(struct atmel_hlcdc_plane *plane,
> xfactor);
>
> /*
> - * With YCbCr 4:2:2 and YCbYcr 4:2:0 window resampling, configuration
> - * register LCDC_HEOCFG25.VXSCFACT and LCDC_HEOCFG27.HXSCFACT is half
> + * With YCbCr 4:2:0 window resampling, configuration register
> + * LCDC_HEOCFG25.VXSCFACT and LCDC_HEOCFG27.HXSCFACT values are half
> * the value of yfactor and xfactor.
> + *
> + * On the other hand, with YCbCr 4:2:2 window resampling, only the
> + * configuration register LCDC_HEOCFG27.HXSCFACT value is half the value
> + * of the xfactor; the value of LCDC_HEOCFG25.VXSCFACT is yfactor (no
> + * division by 2).
> */
> - if (state->base.fb->format->format == DRM_FORMAT_YUV420) {
> + switch (state->base.fb->format->format) {
> + /* YCbCr 4:2:2 */
> + case DRM_FORMAT_YUYV:
> + case DRM_FORMAT_UYVY:
> + case DRM_FORMAT_YVYU:
> + case DRM_FORMAT_VYUY:
> + case DRM_FORMAT_YUV422:
> + case DRM_FORMAT_NV61:
> + xfactor /= 2;
> + break;
> +
> + /* YCbCr 4:2:0 */
> + case DRM_FORMAT_YUV420:
> + case DRM_FORMAT_NV21:
> yfactor /= 2;
> xfactor /= 2;
> + break;
> + default:
> + break;
> }
>
> atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.scaler_config + 2,
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [PATCH] drm: atmel-hlcdc: fix atmel_xlcdc_plane_setup_scaler()
2024-10-21 7:56 ` Nicolas Ferre
@ 2025-01-28 4:59 ` Manikandan.M
0 siblings, 0 replies; 5+ messages in thread
From: Manikandan.M @ 2025-01-28 4:59 UTC (permalink / raw)
To: Nicolas.Ferre, sam, bbrezillon, maarten.lankhorst, mripard,
tzimmermann, airlied, simona, alexandre.belloni, claudiu.beznea,
Hari.PrasathGE, Durai.ManickamKR, dri-devel, linux-arm-kernel,
linux-kernel, Cyrille.Pitchen
Hi,
A gentle reminder to merge this patch.
On 21/10/24 1:26 pm, Nicolas Ferre wrote:
> On 14/10/2024 at 11:49, Manikandan Muralidharan wrote:
>> From: Cyrille Pitchen <cyrille.pitchen@microchip.com>
>>
>> On SoCs, like the SAM9X75, which embed the XLCDC ip, the registers that
>> configure the unified scaling engine were not filled with proper values.
>>
>> Indeed, for YCbCr formats, the VXSCFACT bitfield of the HEOCFG25
>> register and the HXSCFACT bitfield of the HEOCFG27 register were
>> incorrect.
>>
>> For 4:2:0 formats, both vertical and horizontal factors for
>> chroma chanels should be divided by 2 from the factors for the luma
>> channel. Hence:
>>
>> HEOCFG24.VXSYFACT = VFACTOR
>> HEOCFG25.VSXCFACT = VFACTOR / 2
>> HEOCFG26.HXSYFACT = HFACTOR
>> HEOCFG27.HXSCFACT = HFACTOR / 2
>>
>> However, for 4:2:2 formats, only the horizontal factor for chroma
>> chanels should be divided by 2 from the factor for the luma channel;
>> the vertical factor is the same for all the luma and chroma channels.
>> Hence:
>>
>> HEOCFG24.VXSYFACT = VFACTOR
>> HEOCFG25.VXSCFACT = VFACTOR
>> HEOCFG26.HXSYFACT = HFACTOR
>> HEOCFG27.HXSCFACT = HFACTOR / 2
>>
>> Fixes: d498771b0b83 ("drm: atmel_hlcdc: Add support for XLCDC using IP
>> specific driver ops")
>> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com>
>
> Thanks Mani and Cyrille:
> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
>
> Best regards,
> Nicolas
>
>> ---
>> .../gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 27 ++++++++++++++++---
>> 1 file changed, 24 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
>> b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
>> index 4bcaf2cd7672..41c7351ae811 100644
>> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
>> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
>> @@ -365,13 +365,34 @@ void atmel_xlcdc_plane_setup_scaler(struct
>> atmel_hlcdc_plane *plane,
>> xfactor);
>> /*
>> - * With YCbCr 4:2:2 and YCbYcr 4:2:0 window resampling,
>> configuration
>> - * register LCDC_HEOCFG25.VXSCFACT and LCDC_HEOCFG27.HXSCFACT is
>> half
>> + * With YCbCr 4:2:0 window resampling, configuration register
>> + * LCDC_HEOCFG25.VXSCFACT and LCDC_HEOCFG27.HXSCFACT values are half
>> * the value of yfactor and xfactor.
>> + *
>> + * On the other hand, with YCbCr 4:2:2 window resampling, only the
>> + * configuration register LCDC_HEOCFG27.HXSCFACT value is half
>> the value
>> + * of the xfactor; the value of LCDC_HEOCFG25.VXSCFACT is yfactor
>> (no
>> + * division by 2).
>> */
>> - if (state->base.fb->format->format == DRM_FORMAT_YUV420) {
>> + switch (state->base.fb->format->format) {
>> + /* YCbCr 4:2:2 */
>> + case DRM_FORMAT_YUYV:
>> + case DRM_FORMAT_UYVY:
>> + case DRM_FORMAT_YVYU:
>> + case DRM_FORMAT_VYUY:
>> + case DRM_FORMAT_YUV422:
>> + case DRM_FORMAT_NV61:
>> + xfactor /= 2;
>> + break;
>> +
>> + /* YCbCr 4:2:0 */
>> + case DRM_FORMAT_YUV420:
>> + case DRM_FORMAT_NV21:
>> yfactor /= 2;
>> xfactor /= 2;
>> + break;
>> + default:
>> + break;
>> }
>> atmel_hlcdc_layer_write_cfg(&plane->layer,
>> desc->layout.scaler_config + 2,
>
--
Thanks and Regards,
Manikandan M.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm: atmel-hlcdc: fix atmel_xlcdc_plane_setup_scaler()
2024-10-14 9:49 [PATCH] drm: atmel-hlcdc: fix atmel_xlcdc_plane_setup_scaler() Manikandan Muralidharan
2024-10-18 23:24 ` Dmitry Baryshkov
2024-10-21 7:56 ` Nicolas Ferre
@ 2025-10-14 10:14 ` Manikandan.M
2 siblings, 0 replies; 5+ messages in thread
From: Manikandan.M @ 2025-10-14 10:14 UTC (permalink / raw)
To: sam, bbrezillon, maarten.lankhorst, mripard, tzimmermann,
airlied, simona, Nicolas.Ferre, alexandre.belloni,
claudiu.beznea, Hari.PrasathGE, Durai.ManickamKR, dri-devel,
linux-arm-kernel, linux-kernel
Cc: Cyrille.Pitchen
On 14/10/24 3:19 pm, Manikandan Muralidharan wrote:
> From: Cyrille Pitchen <cyrille.pitchen@microchip.com>
>
> On SoCs, like the SAM9X75, which embed the XLCDC ip, the registers that
> configure the unified scaling engine were not filled with proper values.
>
> Indeed, for YCbCr formats, the VXSCFACT bitfield of the HEOCFG25
> register and the HXSCFACT bitfield of the HEOCFG27 register were
> incorrect.
>
> For 4:2:0 formats, both vertical and horizontal factors for
> chroma chanels should be divided by 2 from the factors for the luma
> channel. Hence:
>
> HEOCFG24.VXSYFACT = VFACTOR
> HEOCFG25.VSXCFACT = VFACTOR / 2
> HEOCFG26.HXSYFACT = HFACTOR
> HEOCFG27.HXSCFACT = HFACTOR / 2
>
> However, for 4:2:2 formats, only the horizontal factor for chroma
> chanels should be divided by 2 from the factor for the luma channel;
> the vertical factor is the same for all the luma and chroma channels.
> Hence:
>
> HEOCFG24.VXSYFACT = VFACTOR
> HEOCFG25.VXSCFACT = VFACTOR
> HEOCFG26.HXSYFACT = HFACTOR
> HEOCFG27.HXSCFACT = HFACTOR / 2
>
> Fixes: d498771b0b83 ("drm: atmel_hlcdc: Add support for XLCDC using IP specific driver ops")
> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com>
Applied to drm-misc-next.
drm: atmel-hlcdc: fix atmel_xlcdc_plane_setup_scaler()
https://gitlab.freedesktop.org/drm/misc/kernel/-/commit/a312acdc
> ---
> .../gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 27 ++++++++++++++++---
> 1 file changed, 24 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> index 4bcaf2cd7672..41c7351ae811 100644
> --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
> @@ -365,13 +365,34 @@ void atmel_xlcdc_plane_setup_scaler(struct atmel_hlcdc_plane *plane,
> xfactor);
>
> /*
> - * With YCbCr 4:2:2 and YCbYcr 4:2:0 window resampling, configuration
> - * register LCDC_HEOCFG25.VXSCFACT and LCDC_HEOCFG27.HXSCFACT is half
> + * With YCbCr 4:2:0 window resampling, configuration register
> + * LCDC_HEOCFG25.VXSCFACT and LCDC_HEOCFG27.HXSCFACT values are half
> * the value of yfactor and xfactor.
> + *
> + * On the other hand, with YCbCr 4:2:2 window resampling, only the
> + * configuration register LCDC_HEOCFG27.HXSCFACT value is half the value
> + * of the xfactor; the value of LCDC_HEOCFG25.VXSCFACT is yfactor (no
> + * division by 2).
> */
> - if (state->base.fb->format->format == DRM_FORMAT_YUV420) {
> + switch (state->base.fb->format->format) {
> + /* YCbCr 4:2:2 */
> + case DRM_FORMAT_YUYV:
> + case DRM_FORMAT_UYVY:
> + case DRM_FORMAT_YVYU:
> + case DRM_FORMAT_VYUY:
> + case DRM_FORMAT_YUV422:
> + case DRM_FORMAT_NV61:
> + xfactor /= 2;
> + break;
> +
> + /* YCbCr 4:2:0 */
> + case DRM_FORMAT_YUV420:
> + case DRM_FORMAT_NV21:
> yfactor /= 2;
> xfactor /= 2;
> + break;
> + default:
> + break;
> }
>
> atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.scaler_config + 2,
--
Thanks and Regards,
Manikandan M.
^ permalink raw reply [flat|nested] 5+ messages in thread