[PATCH V2 0/4] LoongArch: Add PREEMPT_RT support

[PATCH V2 0/4] LoongArch: Add PREEMPT_RT support

[Huacai Chen]

This series add PREEMPT_RT support for LoongArch.

With the recent printk changes, the last known road block has been
addressed. The main architectural preparation we need is selecting
HAVE_POSIX_CPU_TIMERS_TASK_WORK to allow PREEMPT_RT coexist with KVM.
Then we can also enable PREEMPT_RT as X86, ARM64 and RISC-V.

V1 -> V2:
1. Fix sleeping in atomic context for PREEMPT_RT.
2. Reduce min_delta to 100 for PREEMPT_RT and update commit messages.

Huacai Chen(4):
 LoongArch: Reduce min_delta for the arch clockevent device.
 LoongArch: Fix sleeping in atomic context for PREEMPT_RT.
 LoongArch: Select HAVE_POSIX_CPU_TIMERS_TASK_WORK.
 LoongArch: Allow to enable PREEMPT_RT.

Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
---
 arch/loongarch/Kconfig       | 2 ++
 arch/loongarch/kernel/time.c | 6 +++++-
 arch/loongarch/mm/tlb.c      | 2 +-
 3 files changed, 8 insertions(+), 2 deletions(-)
---
2.27.0

[PATCH V2 1/4] LoongArch: Reduce min_delta for the arch clockevent device

[Huacai Chen]

Now the min_delta is 0x600 (1536) for LoongArch's constant clockevent
device. For a 100MHz hardware timer this means ~15us. This is a little
big, especially for PREEMPT_RT enabled kernels. So reduce it to 100 for
PREEMPT_RT kernel, and 1000 for others (we don't want too small values
to affect performance).

Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
---
 arch/loongarch/kernel/time.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/arch/loongarch/kernel/time.c b/arch/loongarch/kernel/time.c
index 46d7d40c87e3..a07d7eff4dc5 100644
--- a/arch/loongarch/kernel/time.c
+++ b/arch/loongarch/kernel/time.c
@@ -127,7 +127,11 @@ void sync_counter(void)
 int constant_clockevent_init(void)
 {
 	unsigned int cpu = smp_processor_id();
-	unsigned long min_delta = 0x600;
+#ifdef CONFIG_PREEMPT_RT
+	unsigned long min_delta = 100;
+#else
+	unsigned long min_delta = 1000;
+#endif
 	unsigned long max_delta = (1UL << 48) - 1;
 	struct clock_event_device *cd;
 	static int irq = 0, timer_irq_installed = 0;
-- 
2.43.5

[PATCH V2 2/4] LoongArch: Fix sleeping in atomic context for PREEMPT_RT

[Huacai Chen]

Commit bab1c299f3945ffe79 ("LoongArch: Fix sleeping in atomic context in
setup_tlb_handler()") changes the gfp flag from GFP_KERNEL to GFP_ATOMIC
for alloc_pages_node(). However, for PREEMPT_RT kernels we can still get
a "sleeping in atomic context" error:

[    0.372259] BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48
[    0.372266] in_atomic(): 1, irqs_disabled(): 1, non_block: 0, pid: 0, name: swapper/1
[    0.372268] preempt_count: 1, expected: 0
[    0.372270] RCU nest depth: 1, expected: 1
[    0.372272] 3 locks held by swapper/1/0:
[    0.372274]  #0: 900000000c9f5e60 (&pcp->lock){+.+.}-{3:3}, at: get_page_from_freelist+0x524/0x1c60
[    0.372294]  #1: 90000000087013b8 (rcu_read_lock){....}-{1:3}, at: rt_spin_trylock+0x50/0x140
[    0.372305]  #2: 900000047fffd388 (&zone->lock){+.+.}-{3:3}, at: __rmqueue_pcplist+0x30c/0xea0
[    0.372314] irq event stamp: 0
[    0.372316] hardirqs last  enabled at (0): [<0000000000000000>] 0x0
[    0.372322] hardirqs last disabled at (0): [<9000000005947320>] copy_process+0x9c0/0x26e0
[    0.372329] softirqs last  enabled at (0): [<9000000005947320>] copy_process+0x9c0/0x26e0
[    0.372335] softirqs last disabled at (0): [<0000000000000000>] 0x0
[    0.372341] CPU: 1 UID: 0 PID: 0 Comm: swapper/1 Not tainted 6.12.0-rc7+ #1891
[    0.372346] Hardware name: Loongson Loongson-3A5000-7A1000-1w-CRB/Loongson-LS3A5000-7A1000-1w-CRB, BIOS vUDK2018-LoongArch-V2.0.0-prebeta9 10/21/2022
[    0.372349] Stack : 0000000000000089 9000000005a0db9c 90000000071519c8 9000000100388000
[    0.372486]         900000010038b890 0000000000000000 900000010038b898 9000000007e53788
[    0.372492]         900000000815bcc8 900000000815bcc0 900000010038b700 0000000000000001
[    0.372498]         0000000000000001 4b031894b9d6b725 00000000055ec000 9000000100338fc0
[    0.372503]         00000000000000c4 0000000000000001 000000000000002d 0000000000000003
[    0.372509]         0000000000000030 0000000000000003 00000000055ec000 0000000000000003
[    0.372515]         900000000806d000 9000000007e53788 00000000000000b0 0000000000000004
[    0.372521]         0000000000000000 0000000000000000 900000000c9f5f10 0000000000000000
[    0.372526]         90000000076f12d8 9000000007e53788 9000000005924778 0000000000000000
[    0.372532]         00000000000000b0 0000000000000004 0000000000000000 0000000000070000
[    0.372537]         ...
[    0.372540] Call Trace:
[    0.372542] [<9000000005924778>] show_stack+0x38/0x180
[    0.372548] [<90000000071519c4>] dump_stack_lvl+0x94/0xe4
[    0.372555] [<900000000599b880>] __might_resched+0x1a0/0x260
[    0.372561] [<90000000071675cc>] rt_spin_lock+0x4c/0x140
[    0.372565] [<9000000005cbb768>] __rmqueue_pcplist+0x308/0xea0
[    0.372570] [<9000000005cbed84>] get_page_from_freelist+0x564/0x1c60
[    0.372575] [<9000000005cc0d98>] __alloc_pages_noprof+0x218/0x1820
[    0.372580] [<900000000593b36c>] tlb_init+0x1ac/0x298
[    0.372585] [<9000000005924b74>] per_cpu_trap_init+0x114/0x140
[    0.372589] [<9000000005921964>] cpu_probe+0x4e4/0xa60
[    0.372592] [<9000000005934874>] start_secondary+0x34/0xc0
[    0.372599] [<900000000715615c>] smpboot_entry+0x64/0x6c

This is because in PREEMPT_RT kernels normal spinlocks are replaced by
rt spinlocks and rt_spin_lock() will cause sleeping. Fix it by disabling
NUMA optimization completely for PREEMPT_RT kernels.

Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
---
 arch/loongarch/mm/tlb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/loongarch/mm/tlb.c b/arch/loongarch/mm/tlb.c
index 5ac9beb5f093..3b427b319db2 100644
--- a/arch/loongarch/mm/tlb.c
+++ b/arch/loongarch/mm/tlb.c
@@ -289,7 +289,7 @@ static void setup_tlb_handler(int cpu)
 		/* Avoid lockdep warning */
 		rcutree_report_cpu_starting(cpu);
 
-#ifdef CONFIG_NUMA
+#if defined(CONFIG_NUMA) && !defined(CONFIG_PREEMPT_RT)
 		vec_sz = sizeof(exception_handlers);
 
 		if (pcpu_handlers[cpu])
-- 
2.43.5

Re: [PATCH V2 2/4] LoongArch: Fix sleeping in atomic context for PREEMPT_RT

[Sebastian Andrzej Siewior]

On 2024-11-17 13:40:15 [+0800], Huacai Chen wrote:
> Commit bab1c299f3945ffe79 ("LoongArch: Fix sleeping in atomic context in
> setup_tlb_handler()") changes the gfp flag from GFP_KERNEL to GFP_ATOMIC
> for alloc_pages_node(). However, for PREEMPT_RT kernels we can still get
> a "sleeping in atomic context" error:
> 
> [    0.372259] BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48
> [    0.372266] in_atomic(): 1, irqs_disabled(): 1, non_block: 0, pid: 0, name: swapper/1
> [    0.372268] preempt_count: 1, expected: 0
> [    0.372270] RCU nest depth: 1, expected: 1
> [    0.372272] 3 locks held by swapper/1/0:
> [    0.372274]  #0: 900000000c9f5e60 (&pcp->lock){+.+.}-{3:3}, at: get_page_from_freelist+0x524/0x1c60
> [    0.372294]  #1: 90000000087013b8 (rcu_read_lock){....}-{1:3}, at: rt_spin_trylock+0x50/0x140
> [    0.372305]  #2: 900000047fffd388 (&zone->lock){+.+.}-{3:3}, at: __rmqueue_pcplist+0x30c/0xea0
> [    0.372314] irq event stamp: 0
> [    0.372316] hardirqs last  enabled at (0): [<0000000000000000>] 0x0
> [    0.372322] hardirqs last disabled at (0): [<9000000005947320>] copy_process+0x9c0/0x26e0
> [    0.372329] softirqs last  enabled at (0): [<9000000005947320>] copy_process+0x9c0/0x26e0
> [    0.372335] softirqs last disabled at (0): [<0000000000000000>] 0x0
> [    0.372341] CPU: 1 UID: 0 PID: 0 Comm: swapper/1 Not tainted 6.12.0-rc7+ #1891
> [    0.372346] Hardware name: Loongson Loongson-3A5000-7A1000-1w-CRB/Loongson-LS3A5000-7A1000-1w-CRB, BIOS vUDK2018-LoongArch-V2.0.0-prebeta9 10/21/2022
> [    0.372349] Stack : 0000000000000089 9000000005a0db9c 90000000071519c8 9000000100388000
> [    0.372486]         900000010038b890 0000000000000000 900000010038b898 9000000007e53788
> [    0.372492]         900000000815bcc8 900000000815bcc0 900000010038b700 0000000000000001
> [    0.372498]         0000000000000001 4b031894b9d6b725 00000000055ec000 9000000100338fc0
> [    0.372503]         00000000000000c4 0000000000000001 000000000000002d 0000000000000003
> [    0.372509]         0000000000000030 0000000000000003 00000000055ec000 0000000000000003
> [    0.372515]         900000000806d000 9000000007e53788 00000000000000b0 0000000000000004
> [    0.372521]         0000000000000000 0000000000000000 900000000c9f5f10 0000000000000000
> [    0.372526]         90000000076f12d8 9000000007e53788 9000000005924778 0000000000000000
> [    0.372532]         00000000000000b0 0000000000000004 0000000000000000 0000000000070000
> [    0.372537]         ...
> [    0.372540] Call Trace:
> [    0.372542] [<9000000005924778>] show_stack+0x38/0x180
> [    0.372548] [<90000000071519c4>] dump_stack_lvl+0x94/0xe4
> [    0.372555] [<900000000599b880>] __might_resched+0x1a0/0x260
> [    0.372561] [<90000000071675cc>] rt_spin_lock+0x4c/0x140
> [    0.372565] [<9000000005cbb768>] __rmqueue_pcplist+0x308/0xea0
> [    0.372570] [<9000000005cbed84>] get_page_from_freelist+0x564/0x1c60
> [    0.372575] [<9000000005cc0d98>] __alloc_pages_noprof+0x218/0x1820
> [    0.372580] [<900000000593b36c>] tlb_init+0x1ac/0x298
> [    0.372585] [<9000000005924b74>] per_cpu_trap_init+0x114/0x140
> [    0.372589] [<9000000005921964>] cpu_probe+0x4e4/0xa60
> [    0.372592] [<9000000005934874>] start_secondary+0x34/0xc0
> [    0.372599] [<900000000715615c>] smpboot_entry+0x64/0x6c
> 
> This is because in PREEMPT_RT kernels normal spinlocks are replaced by
> rt spinlocks and rt_spin_lock() will cause sleeping. Fix it by disabling
> NUMA optimization completely for PREEMPT_RT kernels.
> 
> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
> ---
>  arch/loongarch/mm/tlb.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/loongarch/mm/tlb.c b/arch/loongarch/mm/tlb.c
> index 5ac9beb5f093..3b427b319db2 100644
> --- a/arch/loongarch/mm/tlb.c
> +++ b/arch/loongarch/mm/tlb.c
> @@ -289,7 +289,7 @@ static void setup_tlb_handler(int cpu)
>  		/* Avoid lockdep warning */
>  		rcutree_report_cpu_starting(cpu);
>  
> -#ifdef CONFIG_NUMA
> +#if defined(CONFIG_NUMA) && !defined(CONFIG_PREEMPT_RT)
>  		vec_sz = sizeof(exception_handlers);

How does this work with NUMA and RT? You don't allocate memory and
everything is fine? Couldn't you pre-allocate the memory on the boot CPU
before kicking the CPU to boot? And then just assign the memory here.

>  		if (pcpu_handlers[cpu])

Sebastian

Re: [PATCH V2 2/4] LoongArch: Fix sleeping in atomic context for PREEMPT_RT

[Huacai Chen]

On Wed, Nov 20, 2024 at 3:40 PM Sebastian Andrzej Siewior
<bigeasy@linutronix.de> wrote:
>
> On 2024-11-17 13:40:15 [+0800], Huacai Chen wrote:
> > Commit bab1c299f3945ffe79 ("LoongArch: Fix sleeping in atomic context in
> > setup_tlb_handler()") changes the gfp flag from GFP_KERNEL to GFP_ATOMIC
> > for alloc_pages_node(). However, for PREEMPT_RT kernels we can still get
> > a "sleeping in atomic context" error:
> >
> > [    0.372259] BUG: sleeping function called from invalid context at kernel/locking/spinlock_rt.c:48
> > [    0.372266] in_atomic(): 1, irqs_disabled(): 1, non_block: 0, pid: 0, name: swapper/1
> > [    0.372268] preempt_count: 1, expected: 0
> > [    0.372270] RCU nest depth: 1, expected: 1
> > [    0.372272] 3 locks held by swapper/1/0:
> > [    0.372274]  #0: 900000000c9f5e60 (&pcp->lock){+.+.}-{3:3}, at: get_page_from_freelist+0x524/0x1c60
> > [    0.372294]  #1: 90000000087013b8 (rcu_read_lock){....}-{1:3}, at: rt_spin_trylock+0x50/0x140
> > [    0.372305]  #2: 900000047fffd388 (&zone->lock){+.+.}-{3:3}, at: __rmqueue_pcplist+0x30c/0xea0
> > [    0.372314] irq event stamp: 0
> > [    0.372316] hardirqs last  enabled at (0): [<0000000000000000>] 0x0
> > [    0.372322] hardirqs last disabled at (0): [<9000000005947320>] copy_process+0x9c0/0x26e0
> > [    0.372329] softirqs last  enabled at (0): [<9000000005947320>] copy_process+0x9c0/0x26e0
> > [    0.372335] softirqs last disabled at (0): [<0000000000000000>] 0x0
> > [    0.372341] CPU: 1 UID: 0 PID: 0 Comm: swapper/1 Not tainted 6.12.0-rc7+ #1891
> > [    0.372346] Hardware name: Loongson Loongson-3A5000-7A1000-1w-CRB/Loongson-LS3A5000-7A1000-1w-CRB, BIOS vUDK2018-LoongArch-V2.0.0-prebeta9 10/21/2022
> > [    0.372349] Stack : 0000000000000089 9000000005a0db9c 90000000071519c8 9000000100388000
> > [    0.372486]         900000010038b890 0000000000000000 900000010038b898 9000000007e53788
> > [    0.372492]         900000000815bcc8 900000000815bcc0 900000010038b700 0000000000000001
> > [    0.372498]         0000000000000001 4b031894b9d6b725 00000000055ec000 9000000100338fc0
> > [    0.372503]         00000000000000c4 0000000000000001 000000000000002d 0000000000000003
> > [    0.372509]         0000000000000030 0000000000000003 00000000055ec000 0000000000000003
> > [    0.372515]         900000000806d000 9000000007e53788 00000000000000b0 0000000000000004
> > [    0.372521]         0000000000000000 0000000000000000 900000000c9f5f10 0000000000000000
> > [    0.372526]         90000000076f12d8 9000000007e53788 9000000005924778 0000000000000000
> > [    0.372532]         00000000000000b0 0000000000000004 0000000000000000 0000000000070000
> > [    0.372537]         ...
> > [    0.372540] Call Trace:
> > [    0.372542] [<9000000005924778>] show_stack+0x38/0x180
> > [    0.372548] [<90000000071519c4>] dump_stack_lvl+0x94/0xe4
> > [    0.372555] [<900000000599b880>] __might_resched+0x1a0/0x260
> > [    0.372561] [<90000000071675cc>] rt_spin_lock+0x4c/0x140
> > [    0.372565] [<9000000005cbb768>] __rmqueue_pcplist+0x308/0xea0
> > [    0.372570] [<9000000005cbed84>] get_page_from_freelist+0x564/0x1c60
> > [    0.372575] [<9000000005cc0d98>] __alloc_pages_noprof+0x218/0x1820
> > [    0.372580] [<900000000593b36c>] tlb_init+0x1ac/0x298
> > [    0.372585] [<9000000005924b74>] per_cpu_trap_init+0x114/0x140
> > [    0.372589] [<9000000005921964>] cpu_probe+0x4e4/0xa60
> > [    0.372592] [<9000000005934874>] start_secondary+0x34/0xc0
> > [    0.372599] [<900000000715615c>] smpboot_entry+0x64/0x6c
> >
> > This is because in PREEMPT_RT kernels normal spinlocks are replaced by
> > rt spinlocks and rt_spin_lock() will cause sleeping. Fix it by disabling
> > NUMA optimization completely for PREEMPT_RT kernels.
> >
> > Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
> > ---
> >  arch/loongarch/mm/tlb.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/loongarch/mm/tlb.c b/arch/loongarch/mm/tlb.c
> > index 5ac9beb5f093..3b427b319db2 100644
> > --- a/arch/loongarch/mm/tlb.c
> > +++ b/arch/loongarch/mm/tlb.c
> > @@ -289,7 +289,7 @@ static void setup_tlb_handler(int cpu)
> >               /* Avoid lockdep warning */
> >               rcutree_report_cpu_starting(cpu);
> >
> > -#ifdef CONFIG_NUMA
> > +#if defined(CONFIG_NUMA) && !defined(CONFIG_PREEMPT_RT)
> >               vec_sz = sizeof(exception_handlers);
>
> How does this work with NUMA and RT? You don't allocate memory and
> everything is fine? Couldn't you pre-allocate the memory on the boot CPU
> before kicking the CPU to boot? And then just assign the memory here.
Allocating percpu exception pages on the own node is just an
optimization, everything can work without this optimization.
Preallocation is meaningless because all pages come from Node-0.

Huacai

>
> >               if (pcpu_handlers[cpu])
>
> Sebastian

Re: [PATCH V2 2/4] LoongArch: Fix sleeping in atomic context for PREEMPT_RT

[Sebastian Andrzej Siewior]

On 2024-11-20 15:46:08 [+0800], Huacai Chen wrote:
> > > diff --git a/arch/loongarch/mm/tlb.c b/arch/loongarch/mm/tlb.c
> > > index 5ac9beb5f093..3b427b319db2 100644
> > > --- a/arch/loongarch/mm/tlb.c
> > > +++ b/arch/loongarch/mm/tlb.c
> > > @@ -289,7 +289,7 @@ static void setup_tlb_handler(int cpu)
> > >               /* Avoid lockdep warning */
> > >               rcutree_report_cpu_starting(cpu);
> > >
> > > -#ifdef CONFIG_NUMA
> > > +#if defined(CONFIG_NUMA) && !defined(CONFIG_PREEMPT_RT)
> > >               vec_sz = sizeof(exception_handlers);
> >
> > How does this work with NUMA and RT? You don't allocate memory and
> > everything is fine? Couldn't you pre-allocate the memory on the boot CPU
> > before kicking the CPU to boot? And then just assign the memory here.
> Allocating percpu exception pages on the own node is just an
> optimization, everything can work without this optimization.
> Preallocation is meaningless because all pages come from Node-0.

Don't you have alloc_pages_node() where you can set the node?
And I mean pre-allocation so you don't have to allocate memory here but
already have it ready.

> Huacai

Sebastian

Re: [PATCH V2 2/4] LoongArch: Fix sleeping in atomic context for PREEMPT_RT

[Huacai Chen]

On Wed, Nov 20, 2024 at 4:05 PM Sebastian Andrzej Siewior
<bigeasy@linutronix.de> wrote:
>
> On 2024-11-20 15:46:08 [+0800], Huacai Chen wrote:
> > > > diff --git a/arch/loongarch/mm/tlb.c b/arch/loongarch/mm/tlb.c
> > > > index 5ac9beb5f093..3b427b319db2 100644
> > > > --- a/arch/loongarch/mm/tlb.c
> > > > +++ b/arch/loongarch/mm/tlb.c
> > > > @@ -289,7 +289,7 @@ static void setup_tlb_handler(int cpu)
> > > >               /* Avoid lockdep warning */
> > > >               rcutree_report_cpu_starting(cpu);
> > > >
> > > > -#ifdef CONFIG_NUMA
> > > > +#if defined(CONFIG_NUMA) && !defined(CONFIG_PREEMPT_RT)
> > > >               vec_sz = sizeof(exception_handlers);
> > >
> > > How does this work with NUMA and RT? You don't allocate memory and
> > > everything is fine? Couldn't you pre-allocate the memory on the boot CPU
> > > before kicking the CPU to boot? And then just assign the memory here.
> > Allocating percpu exception pages on the own node is just an
> > optimization, everything can work without this optimization.
> > Preallocation is meaningless because all pages come from Node-0.
>
> Don't you have alloc_pages_node() where you can set the node?
This function is called when a non-boot cpu is online, at this point
NUMA has already been initialized.

> And I mean pre-allocation so you don't have to allocate memory here but
> already have it ready.
If the per-cpu exception handler page is not on its own node,
pre-allocation makes no sense. The performance is the same as
disabling optimization (use global exception handlers).

Huacai

>
> > Huacai
>
> Sebastian

[PATCH V2 3/4] LoongArch: Select HAVE_POSIX_CPU_TIMERS_TASK_WORK

[Huacai Chen]

Move POSIX CPU timer expiry and signal delivery into task context to
allow PREEMPT_RT setups to coexist with KVM.

Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
---
 arch/loongarch/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
index d9fce0fd475a..2443d5a80e0d 100644
--- a/arch/loongarch/Kconfig
+++ b/arch/loongarch/Kconfig
@@ -155,6 +155,7 @@ config LOONGARCH
 	select HAVE_PERF_EVENTS
 	select HAVE_PERF_REGS
 	select HAVE_PERF_USER_STACK_DUMP
+	select HAVE_POSIX_CPU_TIMERS_TASK_WORK
 	select HAVE_PREEMPT_DYNAMIC_KEY
 	select HAVE_REGS_AND_STACK_ACCESS_API
 	select HAVE_RELIABLE_STACKTRACE if UNWINDER_ORC
-- 
2.43.5

[PATCH V2 4/4] LoongArch: Allow to enable PREEMPT_RT

[Huacai Chen]

It is really time.

LoongArch has all the required architecture related changes, that have
been identified over time, in order to enable PREEMPT_RT. With the recent
printk changes, the last known road block has been addressed.

Allow to enable PREEMPT_RT on LoongArch.

Below are the latency data from cyclictest on a 4-core Loongson-3A5000
machine, with a "make -j8" kernel building workload in the background.

1. PREEMPT kernel with default configuration:

./cyclictest -a -t -m -i200 -d0 -p99
policy: fifo: loadavg: 8.78 8.96 8.64 10/296 64800
T: 0 ( 4592) P:99 I:200 C:14838617 Min:   3 Act:    6 Avg:    8 Max:    844
T: 1 ( 4593) P:99 I:200 C:14838765 Min:   3 Act:    9 Avg:    8 Max:    909
T: 2 ( 4594) P:99 I:200 C:14838510 Min:   3 Act:    7 Avg:    8 Max:    832
T: 3 ( 4595) P:99 I:200 C:14838631 Min:   3 Act:    8 Avg:    8 Max:    931

2. PREEMPT_RT kernel with default configuration:

./cyclictest -a -t -m -i200 -d0 -p99
policy: fifo: loadavg: 10.38 10.47 10.35 9/336 77788
T: 0 ( 3941) P:99 I:200 C:19439626 Min:   3 Act:   12 Avg:    8 Max:    227
T: 1 ( 3942) P:99 I:200 C:19439624 Min:   2 Act:   11 Avg:    8 Max:    184
T: 2 ( 3943) P:99 I:200 C:19439623 Min:   3 Act:    4 Avg:    7 Max:    223
T: 3 ( 3944) P:99 I:200 C:19439623 Min:   2 Act:   10 Avg:    7 Max:    226

3. PREEMPT_RT kernel with tuned configuration:

./cyclictest -a -t -m -i200 -d0 -p99
policy: fifo: loadavg: 10.52 10.66 10.62 12/334 109397
T: 0 ( 4765) P:99 I:200 C:29335186 Min:   3 Act:    6 Avg:    8 Max:     62
T: 1 ( 4766) P:99 I:200 C:29335185 Min:   3 Act:   10 Avg:    8 Max:     52
T: 2 ( 4767) P:99 I:200 C:29335184 Min:   3 Act:    8 Avg:    8 Max:     64
T: 3 ( 4768) P:99 I:200 C:29335183 Min:   3 Act:   12 Avg:    8 Max:     53

Main instruments of tuned configuration include: Disable the boot rom
space in BIOS, in order to avoid kernel's speculative access to low-
speed memory (i.e. boot rom space); Disable CPUFreq scaling; Disable
RTC synchronization in the ntpd/chronyd service (also avoid other RTC
accesses when running low-latency workloads).

Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
---
 arch/loongarch/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/loongarch/Kconfig b/arch/loongarch/Kconfig
index 2443d5a80e0d..d5d3679057a1 100644
--- a/arch/loongarch/Kconfig
+++ b/arch/loongarch/Kconfig
@@ -66,6 +66,7 @@ config LOONGARCH
 	select ARCH_SUPPORTS_LTO_CLANG
 	select ARCH_SUPPORTS_LTO_CLANG_THIN
 	select ARCH_SUPPORTS_NUMA_BALANCING
+	select ARCH_SUPPORTS_RT
 	select ARCH_USE_BUILTIN_BSWAP
 	select ARCH_USE_CMPXCHG_LOCKREF
 	select ARCH_USE_QUEUED_RWLOCKS
-- 
2.43.5