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* [PATCH] pwm: stm32-lp: Add check for clk_enable()
@ 2024-12-05  5:17 Mingwei Zheng
  2024-12-05  8:34 ` Uwe Kleine-König
  0 siblings, 1 reply; 3+ messages in thread
From: Mingwei Zheng @ 2024-12-05  5:17 UTC (permalink / raw)
  To: fabrice.gasnier, ukleinek, coquelin.stm32, alexandre.torgue,
	thierry.reding, lee
  Cc: linux-pwm, linux-stm32, linux-arm-kernel, linux-kernel,
	Mingwei Zheng, Jiasheng Jiang

Add check for the return value of clk_enable() to catch the potential
error.

Fixes: e70a540b4e02 ("pwm: Add STM32 LPTimer PWM driver")
Signed-off-by: Mingwei Zheng <zmw12306@gmail.com>
Signed-off-by: Jiasheng Jiang <jiashengjiangcool@gmail.com>
---
 drivers/pwm/pwm-stm32-lp.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/pwm/pwm-stm32-lp.c b/drivers/pwm/pwm-stm32-lp.c
index 989731256f50..4abef304417d 100644
--- a/drivers/pwm/pwm-stm32-lp.c
+++ b/drivers/pwm/pwm-stm32-lp.c
@@ -163,12 +163,16 @@ static int stm32_pwm_lp_get_state(struct pwm_chip *chip,
 	unsigned long rate = clk_get_rate(priv->clk);
 	u32 val, presc, prd;
 	u64 tmp;
+	int ret;
 
 	regmap_read(priv->regmap, STM32_LPTIM_CR, &val);
 	state->enabled = !!FIELD_GET(STM32_LPTIM_ENABLE, val);
 	/* Keep PWM counter clock refcount in sync with PWM initial state */
-	if (state->enabled)
-		clk_enable(priv->clk);
+	if (state->enabled) {
+		ret = clk_enable(priv->clk);
+		if (ret)
+			return ret;
+	}
 
 	regmap_read(priv->regmap, STM32_LPTIM_CFGR, &val);
 	presc = FIELD_GET(STM32_LPTIM_PRESC, val);
-- 
2.34.1


^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2024-12-06  0:51 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2024-12-05  5:17 [PATCH] pwm: stm32-lp: Add check for clk_enable() Mingwei Zheng
2024-12-05  8:34 ` Uwe Kleine-König
2024-12-06  0:51   ` Mingwei Zheng

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